PIC16F72-I/ML Microchip Technology, PIC16F72-I/ML Datasheet - Page 660

IC PIC MCU FLASH 2KX14 28-QFN

PIC16F72-I/ML

Manufacturer Part Number
PIC16F72-I/ML
Description
IC PIC MCU FLASH 2KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F72-I/ML

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F72-I/MLR
PIC16F72-I/MLR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F72-I/ML
Manufacturer:
MICROCHIP
Quantity:
601
PICmicro MID-RANGE MCU FAMILY
A.4
A.4.1
DS31034A-page 34-8
Multi-master
Arbitration
The I
When two or more masters try to transfer data at the same time, arbitration and synchronization
occur.
Arbitration takes place on the SDA line, while the SCL line is high. The master which transmits a
high when the other master transmits a low loses arbitration
output stage. A master which lost arbitration can generate clock pulses until the end of the data
byte where it lost arbitration. When the master devices are addressing the same device, arbitra-
tion continues into the data.
Figure A-9:
Masters that also incorporate the slave function, and have lost arbitration must immediately
switch over to slave-receiver mode. This is because the winning master-transmitter may be
addressing it.
Arbitration is not allowed between:
• A repeated START condition
• A STOP condition and a data bit
• A repeated START condition and a STOP condition
Care needs to be taken to ensure that these conditions do not occur.
2
C protocol allows a system to have more than one master. This is called multi-master.
Multi-Master Arbitration (Two Masters)
DATA 2
SDA
SCL
DATA 1
transmitter 1 loses arbitration
DATA 1 SDA
(Figure
1997 Microchip Technology Inc.
A-9), and turns off its data

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