PIC16F72-I/ML Microchip Technology, PIC16F72-I/ML Datasheet - Page 563
PIC16F72-I/ML
Manufacturer Part Number
PIC16F72-I/ML
Description
IC PIC MCU FLASH 2KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
6.PIC16F72-ISO.pdf
(136 pages)
Specifications of PIC16F72-I/ML
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16F72-I/MLR
PIC16F72-I/MLR
PIC16F72-I/MLR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F72-ISO PDF datasheet #4
- PIC16F72-ISO PDF datasheet #5
- PIC16F72-ISO PDF datasheet #6
- Current page: 563 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1
Example 2
Example 3
Q1
Decode
Q2
register 'f'
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of register 'f' are exchanged. If 'd' is 0 the
result is placed in W register. If 'd' is 1 the result is placed in register 'f'.
1
1
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Read
SWAPF
SWAPF
SWAPF
00
f
[0,1]
Section 29. Instruction Set
127
W
FSR = 0xC2
Contents of Address (FSR) = 0x20
W
FSR = 0xC2
Contents of Address (FSR) = 0x02
Swap Nibbles in f
REG, 0
REG, 1
REG1= 0xA5
REG1= 0xA5
W
REG1= 0xA5
REG1= 0x5A
INDF, 1
Q3
1110
destination<7:4>,
destination<3:0>
Process
= 0x17
= 0x17
data
= 0x5A
dfff
Q4
destination
Write to
ffff
DS31029A-page 29-41
29
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