PIC12CE673-04/P Microchip Technology, PIC12CE673-04/P Datasheet - Page 320

no-image

PIC12CE673-04/P

Manufacturer Part Number
PIC12CE673-04/P
Description
IC MCU OTP 1KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12CE673-04/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12CE673-04/P
Manufacturer:
Microchip
Quantity:
486
PICmicro MID-RANGE MCU FAMILY
17.4.13
17.4.13.1 WCOL Status Flag
DS31017A-page 17-44
Acknowledge Sequence Timing
An acknowledge sequence is enabled by setting the acknowledge sequence enable bit, ACKEN
(SSPCON2<4>). When this bit is set, the SCL pin is pulled low and the contents of the acknowl-
edge data bit is presented on the SDA pin. If the user wishes to generate an acknowledge, then
the ACKDT bit should be cleared. If not, the user should set the ACKDT bit before starting an
acknowledge sequence. The baud rate generator then counts for one rollover period (T
the SCL pin is de-asserted (pulled high). When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T
ACKEN bit is automatically cleared, the baud rate generator is turned off, and the SSP module
then goes into IDLE mode
If the user writes the SSPBUF when an acknowledge sequence is in progress, then WCOL is set
and the contents of the buffer are unchanged (the write doesn’t occur).
Figure 17-29: Acknowledge Sequence Waveform
SSPIF
Acknowledge sequence starts here,
SDA
SCL
Note: T
Set SSPIF at the end
of receive
BRG
= one baud rate generator period.
ACKEN = 1, ACKDT = 0
Write to SSPCON2
(Figure
Preliminary
8
D0
17-29).
BRG
. The SCL pin is then pulled low. Following this, the
Cleared in
software
T
BRG
ACK
T
BRG
9
Set SSPIF at the end
of acknowledge sequence
ACKEN automatically cleared
1997 Microchip Technology Inc.
Cleared in
software
BRG
), and

Related parts for PIC12CE673-04/P