PIC12CE673-04/P Microchip Technology, PIC12CE673-04/P Datasheet - Page 67
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PIC12CE673-04/P
Manufacturer Part Number
PIC12CE673-04/P
Description
IC MCU OTP 1KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(3 pages)
4.PIC12CE673-10P.pdf
(14 pages)
5.PIC12CE673-10P.pdf
(12 pages)
Specifications of PIC12CE673-04/P
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
16Byte
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE673-04/P
Manufacturer:
Microchip
Quantity:
486
FIGURE 9-16: WAKE-UP FROM SLEEP THROUGH INTERRUPT
9.9
If the code protection bit(s) have not been pro-
grammed, the on-chip program memory can be read
out for verification purposes.
9.10
Four memory locations (2000h - 2003h) are designated
as ID locations, where the user can store checksum or
other code-identification numbers. These locations are
not accessible during normal execution, but are read-
able and writable during program/verify. It is recom-
mended that only the 4 least significant bits of the ID
location are used.
9.11
PIC12C67X microcontrollers can be serially pro-
grammed while in the end application circuit. This is
simply done with two lines for clock and data, and three
other lines for power, ground and the programming volt-
age. This allows customers to manufacture boards with
unprogrammed devices, and then program the micro-
controller just before shipping the product. This also
allows the most recent firmware or a custom firmware
to be programmed.
The device is placed into a program/verify mode by
holding the GP1 and GP0 pins low, while raising the
MCLR (V
specification). GP1 (clock) becomes the programming
clock and GP0 (data) becomes the programming data.
Both GP0 and GP1 are Schmitt Trigger inputs in this
mode.
Note 1: XT, HS or LP oscillator mode assumed.
Note:
1999 Microchip Technology Inc.
GPIF flag
(INTCON<0>)
GIE bit
(INTCON<7>)
INSTRUCTION FLOW
CLKOUT(4)
Instruction
fetched
Instruction
executed
GPIO pin
2: T
3: GIE = ’1’ assumed. In this case after wake- up, the processor jumps to the interrupt routine. If GIE = ’0’, execution will
4: CLKOUT is not available in XT, HS or LP osc modes, but shown here for timing reference.
OSC1
Program Verification/Code Protection
ID Locations
In-Circuit Serial Programming
PP
PC
continue in-line.
Microchip does not recommend code pro-
tecting windowed devices.
OST
) pin from V
Inst(PC) = SLEEP
Q1 Q2 Q3 Q4
= 1024T
Inst(PC - 1)
PC
OSC
IL
(drawing not to scale) This delay will not be there for INTRC and EXTRC osc mode.
to V
Q1 Q2 Q3 Q4
Inst(PC + 1)
SLEEP
PC+1
IHH
(see programming
Q1
Processor in
SLEEP
PC+2
T
OST
(2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Inst(PC + 2)
Inst(PC + 1)
After reset, and if the device is placed into program-
ming/verify mode, the program counter (PC) is at loca-
tion 00h. A 6-bit command is then supplied to the
device. Depending on the command, 14-bits of pro-
gram data are then supplied to or from the device,
depending if the command was a load or a read. For
complete details of serial programming, please refer to
the PIC12C67X Programming Specifications.
FIGURE 9-17: TYPICAL IN-CIRCUIT SERIAL
PC+2
External
Connector
Signals
Data I/O
CLK
+5V
V
0V
PP
Interrupt Latency
Dummy cycle
(Note 3)
PC + 2
PROGRAMMING
CONNECTION
To Normal
Connections
To Normal
Connections
Q1 Q2 Q3 Q4
PIC12C67X
Inst(0004h)
Dummy cycle
0004h
DS30561B-page 67
V
V
MCLR/V
GP1
GP0
Q1 Q2 Q3 Q4
DD
SS
PIC12C67X
Inst(0005h)
Inst(0004h)
0005h
V
PP
DD