PIC16F1937-I/P Microchip Technology, PIC16F1937-I/P Datasheet - Page 239

• Manufacturer Part Number: PIC16F1937-I/P
• Description: IC PIC MCU FLASH 512KX14 40-PDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/P

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/MI2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 14
• Height: 4.95 mm
• Length: 53.21 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 14.73 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

FIGURE 20-12:
TABLE 20-8:
© 2008 Microchip Technology Inc.
BAUDCON
INTCON
PIE1
PIR1
RCREG
RCSTA
SPBRG
SPBRGH
TRISC
TXSTA
Legend: x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Master
(SCKP = 0)
(SCKP = 1)
(Interrupt)
Note:
TX/CK pin
TX/CK pin
CREN bit
SREN bit
bit SREN
RCIF bit
Name
RXREG
RX/DT
Write to
Read
pin
*
Reception.
Page provides register information.
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
‘0’
EUSART Receive Data Register
TMR1GIE
TMR1GIF
ABDOVF
TRISC7
BRG15
CSRC
SPEN
BRG7
Bit 7
REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER RECEPTION
GIE
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
TRISC6
BRG14
bit 0
RCIDL
BRG6
ADIE
PEIE
ADIF
Bit 6
RX9
TX9
bit 1
TMR0IE
TRISC5
BRG13
SREN
BRG5
TXEN
RCIE
RCIF
Bit 5
—
bit 2
TRISC4
Preliminary
BRG12
CREN
SCKP
BRG4
SYNC
INTE
Bit 4
TXIE
TXIF
bit 3
TRISC3
ADDEN
SENDB
BRG16
BRG11
SSPIE
SSPIF
IOCIE
BRG3
Bit 3
PIC16F193X/LF193X
bit 4
TMR0IF
CCP1IE
CCP1IF
TRISC2
BRG10
BRGH
FERR
BRG2
Bit 2
—
bit 5
TMR2IE
TMR2IF
TRISC1
OERR
BRG1
BRG9
TRMT
WUE
Bit 1
INTF
bit 6
TMR1IE
TMR1IF
TRISC0
ABDEN
bit 7
BRG8
IOCIF
RX9D
BRG0
TX9D
Bit 0
DS41364A-page 237
Register
on Page
218*
225*
225*
224
223
222
73
74
77
94
‘0’