PIC16F1937-I/ML Microchip Technology, PIC16F1937-I/ML Datasheet - Page 7

IC PIC MCU FLASH 512KX14 44-QFN

PIC16F1937-I/ML

Manufacturer Part Number
PIC16F1937-I/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1937-I/ML

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16F
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NO PAGING SURPRISES
The primary advantage to using relative branches is to
eliminate the possibility of software that works until
additional code is added. Sometimes, a simple delay
loop will fail because code inserted ahead of the loop
pushed the loop across a page boundary. These
surprises are eliminated with the use of a relative
branch.
FIGURE 3:
FSR MEMORY MAP
The large addressing space of the new FSRs provides
the ability to access additional memory besides the
GPR and SFR memory spaces (see Figure 3). The
FSR memory map includes the legacy GPR/SFR
space. In addition, the GPR memory is mirrored into a
linear region to allow large memory blocks to be
accessed via the indirect addressing modes. Lastly, the
low byte of each program memory address is also
mapped into the FSR address space. These two addi-
© 2009 Microchip Technology Inc.
Note 1: Accessing these addresses via FSR causes the instructions to use 1 additional cycle.
FSR Addresses
FSR Addresses
FSR MEMORY MAP
0xFFFF
0x0FFF
0x1FFF
0x29FF
0x2A00
0x7FFF
0x0000
0x1000
0x2000
0x8000
(1)
LINEAR GPR
RESERVED
RESERVED
PROGRAM
MEMORY
Region
GPRs
SRFs
&
Indirect Addressing
Indirect addressing allows an address to be computed
at run time and the data modified. Accessing arrays
and other memory buffers often requires indirect
addressing. The legacy PIC12/16 has very rudimentary
support for indirect addressing with a single FSR/INDF.
The enhanced PIC12/16 has extensive support for indi-
rect addressing.
tions to the memory map allow large memory blocks,
and pointers that access RAM and Flash. The result of
these changes is a large improvement in performance
for large data applications.
Accessible by
Addresses
BSR + File
Addresses
FSR Only
Program
Register
Counter
0x0FFF
0x7FFF
0x0000
0x0000
(1)
DS41375A-page 7

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