ATMEGA48-20PU Atmel, ATMEGA48-20PU Datasheet - Page 271

• Manufacturer Part Number: ATMEGA48-20PU
• Description: IC AVR MCU 4K 20MHZ 5V 28DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA48-20PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire/SPI/USART/Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 28
• Package Type: PDIP
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.5
2545S–AVR–07/10
Boot Loader Lock Bits
Figure 26-2. Memory Sections
Note:
If no Boot Loader capability is needed, the entire Flash is available for application code. The
Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives
the user a unique flexibility to select different levels of protection.
The user can select:
• To protect the entire Flash from a software update by the MCU.
• To protect only the Boot Loader Flash section from a software update by the MCU.
• To protect only the Application Flash section from a software update by the MCU.
• Allow software update in the entire Flash.
See
in Serial or Parallel Programming mode, but they can be cleared by a Chip Erase command
only. The general Write Lock (Lock Bit mode 2) does not control the programming of the Flash
memory by SPM instruction. Similarly, the general Read/Write Lock (Lock Bit mode 1) does not
control reading nor writing by LPM/SPM, if it is attempted.
Table 26-2
1. The parameters in the figure above are given in
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Program Memory
Program Memory
and
BOOTSZ = '11'
BOOTSZ = '01'
Table 26-3
for further details. The Boot Lock bits can be set in software and
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Table 26-6 on page
Program Memory
Program Memory
BOOTSZ = '10'
BOOTSZ = '00'
ATmega48/88/168
280.
0x0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
0x0000
End RWW, End Application
Start NRWW, Start Boot Loader
Flashend
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