ATTINY261-20MU Atmel, ATTINY261-20MU Datasheet - Page 24

• Manufacturer Part Number: ATTINY261-20MU
• Description: IC MCU AVR 2K FLASH 20MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY261-20MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATTINY2x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: 2-Wire, SPI, USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 32MLF EP
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. Clock System
6.1
6.1.1
6.1.2
24
Clock Subsystems
ATtiny261/461/861
CPU Clock – clk
I/O Clock – clk
I/O
Figure 6-1
the clocks need not be active at a given time. In order to reduce power consumption, the clocks
to modules not being used can be halted by using different sleep modes, as described in
Management and Sleep Modes” on page
Figure 6-1.
The clock subsystems are detailed in the sections below.
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
Data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from performing
general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counter. The I/O clock is
also used by the External Interrupt module, but note that some external interrupts are detected
by asynchronous logic, allowing such interrupts to be detected even if the I/O clock is halted.
CPU
clk
PCK
General I/O
Modules
Oscillator
PLL
presents the principal clock systems and their distribution in ATtiny261/461/861. All of
clk
PLL
Clock Distribution
General I/O
Modules
External Clock
clk
I/O
Source clock
System Clock
Control Unit
AVR Clock
Multiplexer
Prescaler
Clock
ADC
Oscillator
Crystal
clk
ADC
36.
clk
clk
Crystal Oscillator
CPU
Low-Frequency
FLASH
Calibrated RC
Oscillator
CPU Core
Reset Logic
Watchdog clock
Watchdog Timer
RAM
Watchdog
Oscillator
Flash and
2588E–AVR–08/10
EEPROM
Calibrated RC
Oscillator
“Power