ATTINY24V-10MU Atmel, ATTINY24V-10MU Datasheet - Page 34
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ATTINY24V-10MU
Manufacturer Part Number
ATTINY24V-10MU
Description
IC MCU AVR 2K FLASH 10MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY24V-10MU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Cpu Family
ATtiny
Device Core
AVR
Device Core Size
8b
Frequency (max)
10MHz
Interface Type
SPI/USI
Total Internal Ram Size
128Byte
# I/os (max)
12
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
MLF
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY24V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.1.2
7.1.3
7.1.4
7.2
34
Software BOD Disable
ATtiny24/44/84
ADC Noise Reduction Mode
Power-Down Mode
Standby Mode
the Analog Comparator can be powered down by setting the ACD bit in
parator Control and Status Register” on page
mode. If the ADC is enabled, a conversion starts automatically when this mode is entered.
When the SM1:0 bits are written to 01, the SLEEP instruction makes the MCU enter ADC Noise
Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, and the
Watchdog to continue operating (if enabled). This sleep mode halts clk
while allowing the other clocks to run.
This improves the noise environment for the ADC, enabling higher resolution measurements. If
the ADC is enabled, a conversion starts automatically when this mode is entered. Apart form the
ADC Conversion Complete interrupt, only an External Reset, a Watchdog Reset, a Brown-out
Reset, an SPM/EEPROM ready interrupt, an external level interrupt on INT0 or a pin change
interrupt can wake up the MCU from ADC Noise Reduction mode.
When the SM1:0 bits are written to 10, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the Oscillator is stopped, while the external interrupts, and the Watch-
dog continue operating (if enabled). Only an External Reset, a Watchdog Reset, a Brown-out
Reset, an external level interrupt on INT0, or a pin change interrupt can wake up the MCU. This
sleep mode halts all generated clocks, allowing operation of asynchronous modules only.
When the SM1:0 bits are 11 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses (see
160), the BOD is actively monitoring the supply voltage during a sleep period. In some devices it
is possible to save power by disabling the BOD by software in Power-Down and Stand-By sleep
modes. The sleep mode power consumption will then be at the same level as when BOD is glob-
ally disabled by fuses.
If BOD is disabled by software, the BOD function is turned off immediately after entering the
sleep mode. Upon wake-up from sleep, BOD is automatically enabled again. This ensures safe
operation in case the V
When the BOD has been disabled, the wake-up time from sleep mode will be approximately
60µs to ensure that the BOD is working correctly before the MCU continues executing code.
BOD disable is controlled by the BODS (BOD Sleep) bit of MCU Control Register, see
– MCU Control Register” on page
Stand-By, while writing a zero keeps the BOD active. The default setting is zero, i.e. BOD active.
Writing to the BODS bit is controlled by a timed sequence and an enable bit, see
MCU Control Register” on page
CC
level has dropped during the sleep period.
36.
36. Writing this bit to one turns off BOD in Power-Down and
130. This will reduce power consumption in Idle
I/O
“ACSR – Analog Com-
, clk
Table 19-4 on page
CPU
, and clk
8006K–AVR–10/10
“MCUCR –
“MCUCR
FLASH
,