PIC18F24J10-I/SO Microchip Technology, PIC18F24J10-I/SO Datasheet - Page 348

• Manufacturer Part Number: PIC18F24J10-I/SO
• Description: IC PIC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1024 B
• Interface Type: SPI, I2C, MSSP, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F45J10 FAMILY
Indexed Literal Offset Mode .............................................. 288
Indirect Addressing ............................................................. 62
INFSNZ ............................................................................. 263
Initialization Conditions for All Registers ....................... 43–46
Instruction Cycle.................................................................. 51
Instruction Flow/Pipelining .................................................. 51
Instruction Set ................................................................... 241
DS39682C-page 346
Clocking Scheme ........................................................ 51
ADDLW ..................................................................... 247
ADDWF ..................................................................... 247
ADDWF (Indexed Literal Offset Mode) ..................... 289
ADDWFC .................................................................. 248
ANDLW ..................................................................... 248
ANDWF ..................................................................... 249
BC ............................................................................. 249
BCF ........................................................................... 250
BN ............................................................................. 250
BNC .......................................................................... 251
BNN .......................................................................... 251
BNOV ........................................................................ 252
BNZ ........................................................................... 252
BOV .......................................................................... 255
BRA........................................................................... 253
BSF ........................................................................... 253
BSF (Indexed Literal Offset Mode) ........................... 289
BTFSC ...................................................................... 254
BTFSS ...................................................................... 254
BTG........................................................................... 255
BZ ............................................................................. 256
CALL ......................................................................... 256
CLRF......................................................................... 257
CLRWDT................................................................... 257
COMF ....................................................................... 258
CPFSEQ ................................................................... 258
CPFSGT ................................................................... 259
CPFSLT .................................................................... 259
DAW.......................................................................... 260
DCFSNZ ................................................................... 261
DECF ........................................................................ 260
DECFSZ.................................................................... 261
Extended Instruction Set ........................................... 283
General Format ......................................................... 243
GOTO ....................................................................... 262
INCF.......................................................................... 262
INCFSZ ..................................................................... 263
INFSNZ ..................................................................... 263
IORLW ...................................................................... 264
IORWF ...................................................................... 264
LFSR ......................................................................... 265
MOVF........................................................................ 265
MOVFF ..................................................................... 266
MOVLB ..................................................................... 266
MOVLW .................................................................... 267
MOVWF .................................................................... 267
MULLW ..................................................................... 268
MULWF ..................................................................... 268
NEGF ........................................................................ 269
NOP .......................................................................... 269
Opcode Field Descriptions ........................................ 242
POP .......................................................................... 270
PUSH ........................................................................ 270
RCALL ...................................................................... 271
RESET ...................................................................... 271
RETFIE ..................................................................... 272
RETLW ..................................................................... 272
Preliminary
INTCON Registers.............................................................. 81
Inter-Integrated Circuit. See I
Internal Oscillator Block ...................................................... 26
Internal RC Oscillator
Internet Address ............................................................... 353
Interrupt Sources .............................................................. 229
Interrupts............................................................................. 79
Interrupts, Flag Bits
INTOSC, INTRC. See Internal Oscillator Block.
IORLW .............................................................................. 264
IORWF .............................................................................. 264
IPR Registers...................................................................... 88
L
LFSR................................................................................. 265
M
Master Clear (MCLR).......................................................... 39
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization ......................................................... 47
Memory Programming Requirements............................... 307
Microchip Internet Web Site.............................................. 353
MOVF ............................................................................... 265
MOVFF ............................................................................. 266
MOVLB ............................................................................. 266
MOVLW ............................................................................ 267
MOVSF ............................................................................. 285
MOVSS............................................................................. 286
MOVWF ............................................................................ 267
MPLAB ASM30 Assembler, Linker, Librarian ................... 292
MPLAB ICD 2 In-Circuit Debugger ................................... 293
MPLAB ICE 2000 High-Performance Universal
RETURN................................................................... 273
RLCF ........................................................................ 273
RLNCF...................................................................... 274
RRCF........................................................................ 274
RRNCF ..................................................................... 275
SETF ........................................................................ 275
SETF (Indexed Literal Offset Mode) ......................... 289
SLEEP ...................................................................... 276
Standard Instructions................................................ 241
SUBFWB .................................................................. 276
SUBLW ..................................................................... 277
SUBWF..................................................................... 277
SUBWFB .................................................................. 278
SWAPF ..................................................................... 278
TBLRD ...................................................................... 279
TBLWT ..................................................................... 280
TSTFSZ .................................................................... 281
XORLW .................................................................... 281
XORWF .................................................................... 282
Use with WDT........................................................... 235
A/D Conversion Complete ........................................ 213
Capture Complete (CCP).......................................... 125
Compare Complete (CCP)........................................ 126
Interrupt-on-Change (RB7:RB4) ................................. 97
INTn Pin...................................................................... 91
PORTB, Interrupt-on-Change ..................................... 91
TMR0 .......................................................................... 91
TMR0 Overflow......................................................... 113
TMR1 Overflow......................................................... 115
TMR2-to-PR2 Match (PWM)............................. 128, 133
Interrupt-on-Change (RB7:RB4) Flag (RBIF Bit) ........ 97
Data Memory .............................................................. 53
Program Memory ........................................................ 47
In-Circuit Emulator .................................................... 293
© 2007 Microchip Technology Inc.
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C Mode.