PIC16F883-I/SS Microchip Technology, PIC16F883-I/SS Datasheet - Page 199
![IC PIC MCU FLASH 4KX14 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F883-I/SS
Manufacturer Part Number
PIC16F883-I/SS
Description
IC PIC MCU FLASH 4KX14 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F883-I/SS
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-3
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
28SSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1631RD-MCC2 - REFERENCE DESIGN MCP1631HVAC164307 - MODULE SKT FOR PM3 28SSOPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F883-I/SS
Manufacturer:
ALPS
Quantity:
12 000
Company:
Part Number:
PIC16F883-I/SS
Manufacturer:
Microchip Technology
Quantity:
28 573
Company:
Part Number:
PIC16F883-I/SS
Manufacturer:
MIC
Quantity:
11
Part Number:
PIC16F883-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
13.4.10
An Acknowledge sequence is enabled by setting the
Acknowledge Sequence Enable bit, ACKEN (SSPCON2
register). When this bit is set, the SCL pin is pulled low
and the contents of the Acknowledge Data bit (ACKDT)
is presented on the SDA pin. If the user wishes to gener-
ate an Acknowledge, then the ACKDT bit should be
cleared. If not, the user should set the ACKDT bit before
starting an Acknowledge sequence. The Baud Rate
Generator then counts for one rollover period (T
the SCL pin is de-asserted (pulled high). When the SCL
pin is sampled high (clock arbitration), the Baud Rate
Generator counts for T
low. Following this, the ACKEN bit is automatically
cleared, the Baud Rate Generator is turned off and the
MSSP module then goes into Idle mode (Figure 13-17).
13.4.10.1
If the user writes the SSPBUF when an Acknowledge
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
FIGURE 13-17:
© 2007 Microchip Technology Inc.
Note: T
ACKNOWLEDGE SEQUENCE TIMING
WCOL Status Flag
SSPIF
BRG
Acknowledge sequence starts here,
SDA
SCL
= one Baud Rate Generator period.
BRG
ACKNOWLEDGE SEQUENCE WAVEFORM
Set SSPIF at the end
of receive
. The SCL pin is then pulled
ACKEN = 1, ACKDT = 0
Write to SSPCON2
8
D0
BRG
PIC16F882/883/884/886/887
) and
Preliminary
Cleared in
software
T
BRG
ACK
13.4.11
A Stop bit is asserted on the SDA pin at the end of a
receive/transmit by setting the Stop Sequence Enable
bit, PEN (SSPCON2 register). At the end of a
receive/transmit, the SCL line is held low after the fall-
ing edge of the ninth clock. When the PEN bit is set, the
master will assert the SDA line low. When the SDA line
is sampled low, the Baud Rate Generator is reloaded
and counts down to 0. When the Baud Rate Generator
times out, the SCL pin will be brought high, and one
T
SDA pin will be de-asserted. When the SDA pin is sam-
pled high while SCL is high, the P bit (SSPSTAT regis-
ter) is set. A T
SSPIF bit is set (Figure 13-18).
13.4.11.1
If the user writes the SSPBUF when a Stop sequence
is in progress, then the WCOL bit is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
BRG
T
BRG
9
(Baud Rate Generator rollover count) later, the
Set SSPIF at the end
of Acknowledge sequence
STOP CONDITION TIMING
WCOL Status Flag
BRG
ACKEN automatically cleared
later, the PEN bit is cleared and the
Cleared in
software
DS41291D-page 197