PIC16F616-I/SL Microchip Technology, PIC16F616-I/SL Datasheet - Page 16

IC PIC MCU FLASH 2KX14 14SOIC

PIC16F616-I/SL

Manufacturer Part Number
PIC16F616-I/SL
Description
IC PIC MCU FLASH 2KX14 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F616-I/SL

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
11
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
11
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1631RD-DCPC1 - REF DES BATT CHARG OR LED DRIVERAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC16F610/616/16HV610/616
TABLE 2-1:
DS41288C-page 14
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Addr
1:
2:
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTC
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM1CON
ECCPAS
VRCON
CM1CON0
CM2CON0
CM2CON1
ADRESH
ADCON0
Name
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
IRP and RP1 bits are reserved, always maintain these bits clear.
PIC16F616/16HV616 only.
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
PIC16F610/616/16HV610/616 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module’s Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0
Unimplemented
Unimplemented
Most Significant 8 bits of the left shifted A/D result or 2 bits of right shifted result
MC1OUT
C1VREN
T1GINV
PRSEN
C1ON
C2ON
ADFM
IRP
P1M1
Bit 7
GIE
(1)
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
TMR1GE
C2VREN
MC2OUT
C1OUT
C2OUT
ADIF
RP1
PDC6
VCFG
P1M0
Bit 6
PEIE
(1)
(2)
CCP1IF
T1CKPS1
DC1B1
PDC5
C1OE
C2OE
CHS3
Bit 5
T0IE
VRR
RP0
RA5
RC5
(2)
T1CKPS0 T1OSCEN
FVREN
DC1B0
C1POL
C2POL
T1ACS
Preliminary
PDC4
CHS2
INTE
Bit 4
C2IF
RA4
RC4
TO
Write Buffer for upper 5 bits of Program Counter
CCP1M3
PSSAC1
C1HYS
PDC3
CHS1
RAIE
Bit 3
C1IF
RA3
RC3
VR3
PD
TMR2ON
T1SYNC
CCP1M2
PSSAC0
C2HYS
PDC2
CHS0
Bit 2
RC2
T0IF
C1R
C2R
RA2
VR2
Z
GO/DONE
TMR2IF
T2CKPS1
TMR1CS
CCP1M1
PSSBD1
C1CH1
C2CH1
T1GSS
PDC1
Bit 1
INTF
RC1
RA1
VR1
DC
(2)
© 2007 Microchip Technology Inc.
T2CKPS0 -000 0000
TMR1ON
CCP1M0
C2SYNC
PSSBD0
TMR1IF
C1CH0
C2CH0
ADON
PDC0
RAIF
Bit 0
RA0
RC0
VR0
C
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--x0 x000
--xx 00xx
---0 0000
0000 0000
-000 0-00
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
XXXX XXXX
XXXX XXXX
0000 0000
0000 0000
0000 0000 100, 113
0000 0000
0000 -000
0000 -000
00-0 0010
xxxx xxxx
0000 0000
POR, BOR
Value on
22, 113
43, 113
22, 113
16, 113
22, 113
31, 113
40, 113
22, 113
18, 113
20, 113
47, 113
47, 113
50, 113
53, 113
54, 113
84, 113
84, 113
83, 113
83, 113
70, 113
60, 113
61, 113
63, 113
78, 113
76, 113
Page

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