PIC12F609-I/SN Microchip Technology, PIC12F609-I/SN Datasheet - Page 97

• Manufacturer Part Number: PIC12F609-I/SN
• Description: IC PIC MCU FLASH 1KX14 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F609-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS-232 / USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.4
The Enhanced PWM Mode can generate a PWM signal
on up to four different output pins with up to 10-bits of
resolution. It can do this through four different PWM
output modes:
• Single PWM
• Half-Bridge PWM
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
FIGURE 11-5:
TABLE 11-6:
 2010 Microchip Technology Inc.
ECCP Mode
Single
Half-Bridge
Note 1: The TRIS register value for each PWM output must be configured appropriately.
Note
CCPR1H (Slave)
Duty Cycle Registers
Comparator
2: Clearing the CCP1CON register will relinquish ECCP control of all PWM output pins.
3: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
PWM (Enhanced Mode)
1:
CCPR1L
*
PR2
TMR2
Comparator
Alternate pin function.
The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit time base.
EXAMPLE PIN ASSIGNMENTS FOR VARIOUS PWM ENHANCED MODES
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timer2,
toggle PWM pin and
latch duty cycle
CCP1<1:0>
PIC12F609/615/617/12HV609/615
R
S
P1M<1:0>
P1M<1:0>
Q
00
10
PWM1CON
Controller
Output
2
CCP1/P1A
The PWM outputs are multiplexed with I/O pins and are
designated P1A and P1B. The polarity of the PWM pins
is configurable and is selected by setting the CCP1M
bits in the CCP1CON register appropriately.
Table 11-6 shows the pin assignments for each
Enhanced PWM mode.
Figure 11-5 shows an example of a simplified block
diagram of the Enhanced PWM module.
P1B
Note:
4
CCP1M<3:0>
(APFCON<0>)
(APFCON<1>)
CCP1/P1A
P1ASEL
P1BSEL
Yes
Yes
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
0
1
0
1
(1)
prevent
TRISIO2
TRISIO5
TRISIO0
TRISIO4
the
generation
DS41302D-page 97
CCP1/P1A*
P1B*
CCP1/P1A
P1B
Yes
P1B
Yes
(1)
of
an