PESD24VL2BT,215 NXP Semiconductors, PESD24VL2BT,215 Datasheet - Page 10

• Manufacturer Part Number: PESD24VL2BT,215
• Description: DIODE ESD PROTECTION SOT23
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of PESD24VL2BT,215

• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Voltage - Reverse Standoff (typ): 24V
• Voltage - Breakdown: 25.4V
• Power (watts): 200W
• Polarization: 2 Channel Array - Bidirectional
• Mounting Type: Surface Mount
• Polarity: Bidirectional
• Clamping Voltage: 40 V
• Operating Voltage: 24 V
• Breakdown Voltage: 27.8 V
• Termination Style: SMD/SMT
• Peak Surge Current: 3 A
• Peak Pulse Power Dissipation: 200 W
• Capacitance: 11 pF
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Dimensions: 2.5 mm W x 3 mm L x 1.1 mm H
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4035-2; 934058867215; PESD24VL2BT T/R; PESD24VL2BT T/R

NXP Semiconductors
7. Application information
PESDXL2BT_SER_2
Product data sheet
The PESDxL2BT series is designed for the protection of two bidirectional signal lines from
the damage caused by ESD and surge pulses. The PESDxL2BT series may be used on
lines where the signal polarities are above and below ground. The PESDxL2BT series
provides a surge capability of up to 350 W per line for an 8/20 s waveform.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESDxL2BT as close to the input terminal or connector as possible.
2. The path length between the PESDxL2BT and the protected line should be
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
Fig 10. Application diagram
minimized.
ground loops.
vias.
Low capacitance double bidirectional ESD protection diodes in SOT23
Rev. 02 — 25 August 2009
line 1 to be protected
line 2 to be protected
PESDxL2BT
PESDxL2BT series
006aaa163
GND
© NXP B.V. 2009. All rights reserved.
10 of 14