C8051F000DK-E Silicon Laboratories Inc, C8051F000DK-E Datasheet - Page 129

• Manufacturer Part Number: C8051F000DK-E
• Description: DEV KIT FOR C8051F000/F001/F002
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F000DK-E

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

129
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Bits7-0: SCR7-SCR0: SPI Clock Rate
Bits7-0: SPI0DAT: SPI0 Transmit and Receive Data.
SCR7
R/W
R/W
Bit7
Bit7
These bits determine the frequency of the SCK output when the SPI module is
configured for master mode operation. The SCK clock frequency is a divided down
version of the system clock, and is given in the following equations:
f
The SPI0DAT register is used to transmit and receive SPI data. Writing data to SPI0DAT
places the data immediately into the shift register and initiates a transfer when in Master
Mode. A read of SPI0DAT returns the contents of the receive buffer.
SCK
= 0.5 * f
SCR6
R/W
R/W
Bit6
Bit6
SYSCLK
Figure 17.7. SPI0CKR: SPI Clock Rate Register
SCR5
Figure 17.8. SPI0DAT: SPI Data Register
R/W
R/W
Bit5
Bit5
/ (SPI0CKR + 1),
SCR4
R/W
R/W
Bit4
Bit4
Rev. 1.7
SCR3
R/W
R/W
Bit3
Bit3
for 0  SPI0CKR  255,
SCR2
R/W
R/W
Bit2
Bit2
SCR1
R/W
R/W
Bit1
Bit1
SCR0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
00000000
00000000
0x9D
0x9B