Z8F08200100KITG Zilog, Z8F08200100KITG Datasheet - Page 94

• Manufacturer Part Number: Z8F08200100KITG
• Description: DEV KIT FOR Z8 ENCORE 8K/4K
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F08200100KITG

• Contents: Evaluation Board, Cable, Power Supply, Software and Documentation
• Silicon Manufacturer: Zilog
• Core Architecture: Z8 Encore
• Silicon Core Number: Z8F0822SJ020
• Silicon Family Name: XP F0822
• Rohs Compliant: Yes
• For Use With/related Products: Z8 Encore!™
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4630

Table 46. Timer 0–1 Control Register (TxCTL)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Timer 0–1 Control 1 Registers
TEN
7
The Timer 0–1 Control (TxCTL) registers enable/disable the timers, set the prescaler
value, and determine the timer operating mode.
TEN—Timer Enable
0 = Timer is disabled.
1 = Timer enabled to count.
TPOL—Timer Input/Output Polarity
Operation of this bit is a function of the current operating mode of the timer.
ONE-SHOT Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer Reload.
CONTINUOUS Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit. When the
timer is enabled, the Timer Output signal is complemented upon timer Reload.
COUNTER Mode
If the timer is enabled the Timer Output signal is complemented after timer reload.
0 = Count occurs on the rising edge of the Timer Input signal.
1 = Count occurs on the falling edge of the Timer Input signal.
PWM Mode
0 = Timer Output is forced Low (0) when the timer is disabled. When enabled,
1 = Timer Output is forced High (1) when the timer is disabled. When enabled,
CAPTURE Mode
0 = Count is captured on the rising edge of the Timer Input signal.
1 = Count is captured on the falling edge of the Timer Input signal.
the Timer Output is forced High (1) upon PWM count match and forced
Low (0) upon Reload.
the Timer Output is forced Low (0) upon PWM count match and forced
High (1) upon Reload.
TPOL
6
5
PRES
4
F07H, F0FH
R/W
0
3
Z8 Encore! XP
2
Product Specification
TMODE
1
®
F0822 Series
0
Timers
81