STEVAL-ISA026V1 STMicroelectronics, STEVAL-ISA026V1 Datasheet - Page 24

• Manufacturer Part Number: STEVAL-ISA026V1
• Description: EVAL BOARD 20A 250KHZ L6732
• Manufacturer: STMicroelectronics
• Type: DC/DC Switching Converters, Regulators & Controllersr

Specifications of STEVAL-ISA026V1

• Design Resources: STEVAL-ISA026V1 Gerber Files STEVAL-ISA026V1 Schematic STEVAL-ISA026V1 Bill of Material
• Main Purpose: DC/DC, Step Down
• Outputs And Type: 1, Non-Isolated
• Voltage - Output: 3.3V
• Current - Output: 20A
• Voltage - Input: 4.5 ~ 14V
• Regulator Topology: Buck
• Frequency - Switching: 250kHz
• Board Type: Fully Populated
• Utilized Ic / Part: L6732
• Input Voltage: 4.5 V to 14 V
• Output Voltage: 3.3 V
• Product: Power Management Modules
• Silicon Manufacturer: ST Micro
• Silicon Core Number: L6732
• Kit Application Type: Power Management - Voltage Regulator
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: L6732
• Other names: 497-5869

Application details
6.4
24/37
Where D is the duty cycle. The equation reaches its maximum value, I
The losses in worst case are:
Equation 12
Compensation network
The loop is based on a voltage mode control
the internal/external reference voltage and scaled by the external resistor divider. The error
amplifier output V
pulse-width modulated (PWM) with an amplitude of V
is filtered by the output filter. The modulator transfer function is the small signal transfer
function of V
L-C
Gain of the modulator is simply the input voltage V
voltage: V
Figure 18. Compensation network
The compensation network consists in the internal error amplifier, the impedance networks
Z
provide a closed loop transfer function with the highest 0dB crossing frequency to have
fastest transient response (but always lower than fsw/10) and the highest gain in DC
conditions to minimize the load regulation error. A stable control loop has a gain crossing the
0dB axis with -20dB/decade slope and a phase margin greater than 45 °. To locate poles
and zeroes of the compensation networks, the following suggestions may be used:
Equation 13
IN
OUT
(R3, R4 and C20) and Z
resonance and a zero at FESR depending on the output capacitor's ESR. The DC
●
OSC
OUT
.
Modulator singularity frequencies:
/V
COMP
COMP
. This function has a double pole at frequency F
is then compared with the oscillator triangular wave to provide a
FB
(R5, C18 and C19). The compensation network has to
P
ω
=
LC
ESR
=
⋅
(Figure
0 (
L
5 .
⋅
1
Cout
⋅
IN
Iout
18.). The output voltage is regulated to
divided by the peak-to-peak oscillator
IN
)
at the PHASE node. This waveform
2
OUT
LC
depending on the
/2 with D = 0.5.
L6732