MAX9218EVKIT+ Maxim Integrated Products, MAX9218EVKIT+ Datasheet - Page 5

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MAX9218EVKIT+

Manufacturer Part Number
MAX9218EVKIT+
Description
KIT PCB EVALUATION FOR MAX9218
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of MAX9218EVKIT+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table_1._MAX9217/MAX9218_EV_Kit_Jumper_Descriptions_(JU1−JU21)_(continued)
*Default position.
Table_2._Video_and_Control_Data_Inputs
Table_3._Input/Output_Clock_Locations
INPUT_SIGNALS
RGB_IN0
RGB_IN1
RGB_IN2
RGB_IN3
RGB_IN4
RGB_IN5
RGB_IN6
RGB_IN7
RGB_IN8
RGB_IN9
RGB_IN10
RGB_IN11
RGB_IN12
RGB_IN13
RGB_IN14
RGB_IN15
RGB_IN16
RGB_IN17
CNTL_IN0
CNTL_IN1
CNTL_IN2
CNTL_IN3
CNTL_IN4
CNTL_IN5
CNTL_IN6
CNTL_IN7
CNTL_IN8
JUMPER
JU21
PCLK_IN
SIGNAL
REFCLK
Board-supply
Board-supply
________________________________________________________________________________________ _ 5
connectivity
connectivity
FUNCTION
DESIGNATION
H9-11
H9-13
H8-11
H8-13
H7-11
H7-13
H6-11
H9-1
H9-3
H9-5
H9-7
H9-9
H8-1
H8-3
H8-5
H8-7
H8-9
H7-1
H7-3
H7-5
H7-7
H7-9
H6-1
H6-3
H6-5
H6-7
H6-9
MAX9217/MAX9218 Evaluation Kit
DESIGNATION
POSITION
H5-5 or P4
H3-5 or P3
SHUNT_
Open
Input video bit 10
Input video bit 11
Input video bit 12
Input video bit 13
Input video bit 14
Input video bit 15
Input video bit 16
Input video bit 17
Input control bit 0
Input control bit 1
Input control bit 2
Input control bit 3
Input control bit 4
Input control bit 5
Input control bit 6
Input control bit 7
Input control bit 8
1-2*
Input video bit 0
Input video bit 1
Input video bit 2
Input video bit 3
Input video bit 4
Input video bit 5
Input video bit 6
Input video bit 7
Input video bit 8
Input video bit 9
DESCRIPTION
Connects DVCC1 to LVCC1. This shunt reduces the number of supplies
required to operate the EV kit.
Disconnects DVCC1 from LVCC1. The 2-pin header can be utilized for
supply current measurements.
The MAX9217/MAX9218 EV kit provides a proven
design to evaluate the MAX9217 27-bit, 3MHz to 35MHz
DC-balanced LVDS serializer and the MAX9218 27-bit,
3MHz to 35MHz DC-balanced LVDS deserializer. The
MAX9217 serializes 27 bits of parallel input data, 18 bits
of video, and 9 bits of control to a serial data stream.
The MAX9218 deserializes the LVDS serial input, which
converts to 18 bits of parallel video data and 9 bits of
parallel control data.
The MAX9217 accepts 27-bit parallel data (18 video data
bits and 9 control data bits). The 27-bit pattern is sup-
plied to the EV kit by connecting a data generator to the
four 20-pin headers (H6–H9), or by connecting selected
pins of H6–H9 to high/low LVCMOS/LVTTL states. See
Table 2 for input bit locations designated on H6–H9.
The MAX9217 DE_IN pin is accessible through header
H6-13._Driving the pin high selects RGB_IN[17:0] to be
latched. Driving the pin low selects CNTL_IN[8:0] to be
latched.
The MAX9217 parallel input clock (PCLK_IN) is acces-
sible through H5-5 or SMA connector P4 (see Table 3).
Apply a clock frequency to the access points, which
latches data and control inputs and provides the PLL
clock.
The MAX9218 reference clock (REFCLK) input is acces-
sible through H3-5 or SMA connector P3 (see Table 3).
Apply a reference clock to the access point that is within
Q2% of the MAX9217 serializer PCLK_IN frequency.
The MAX9218 outputs 27-bit parallel data, 18 video data
bits, and 9 control data bits at LVCMOS/LVTTL levels on
the 40-pin headers (H1 and H2). To sample the 27-bit
Detailed Description of Hardware
DESCRIPTION
Data-Enable Input (DE_IN)
Input and Output Clocks
Output Signals
Input Signals

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