KSZ8001L-EVAL Micrel Inc, KSZ8001L-EVAL Datasheet - Page 32

BOARD EVALUATION FOR KSZ8001L

KSZ8001L-EVAL

Manufacturer Part Number
KSZ8001L-EVAL
Description
BOARD EVALUATION FOR KSZ8001L
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8001L-EVAL

Main Purpose
Interface, Ethernet PHY
Embedded
No
Utilized Ic / Part
KSZ8001L
Primary Attributes
Single Chip PHY, 100BASE-TX/100BASE-FX/10BASE-T
Secondary Attributes
MII, RMII, SMII, HP Auto MDI, MDI-X Auto Polarity Correction, LinkMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
576-1620
March 2006
Micrel
Address
1f:14
1f:13
1f.12
1f.11
1f.10
1f.9
1f.8
1f.7
1f.6
1f.5
1f.4:2
1f.1
1f.0
Name
MDI/MDI-X
Select
Pairswap
disable
Energy detect
Force link
Power Saving
Interrupt Level
Enable Jabber
Auto-
Negotiation
Complete
Enable Pause
(Flow-Control
Result)
PHY Isolate
Operation
Mode
Indication
Enable SQE
test
Disable Data
Scrambling
Description
When Auto MDI/MDI-X is disabled,
0 =
1 =
1 = disable MDI/MDIX
0 = enable MDI/MDIX
1 = presence of signal on RX+/- analog wire
pair
0 = no signal detected on RX+/-
1 = force link pass
0 = normal link operation
This bit bypasses the control logic and allow
transmitter to send pattern even if there is no
link.
1 = enable power saving
0 = disable
1 = interrupt pin active high
0 = active low
1 = enable jabber counter
0 = disable
1 = auto-negotiation complete
0 = not complete
This bit has the same definition as register 1.5.
1 = flow control capable
0 = no flow control
1 = PHY in isolate mode
0 = not isolated
[000] = still in auto-negotiation
[001] = 10BASE-T half duplex
[010] = 100BASE-TX half duplex
[011] = default
[101] = 10BASE-T full duplex
[110] = 100BASE-TX full duplex
[111] = PHY/MII isolate
1 = enable SQE test
0 = disable
1 = disable scrambler
0 = enable
Transmit on TX+/- (pins 41,40)
Receive on RX+/- (pins 33,32)
Transmit on RX+/- (pins 33,32)
Receive on TX+/- (pins 41,40)
32
Mode
RW
RW
RO
RW
RW
RW
RW
RO
RO
RO
RO
RW
RW
Default
0
0
0
0
1
0
1
0
0
0
0
0
0
Revision 1.03
KSZ8001

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