CDB42448 Cirrus Logic Inc, CDB42448 Datasheet - Page 50
CDB42448
Manufacturer Part Number
CDB42448
Description
BOARD EVAL FOR CS42448 CODEC
Manufacturer
Cirrus Logic Inc
Specifications of CDB42448
Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42448
Primary Attributes
24-Bit, 192 kHz, 6 ADCs: 102dB Dynamic Range, 8 DACs: 105dB Dynamic Range
Secondary Attributes
Time Division Multiplexed (TDM), I2C, and SPI Interface, Popguard® Technology
Description/function
Audio CODECs
Operating Supply Voltage
5 V to 12 V
Product
Audio Modules
For Use With/related Products
CS42448
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1151
50
6.10
6.10.1 Invert Signal Polarity (INV_AOUTX)
6.11
6.11.1 AINX Volume Control (AINX_VOL[7:0])
6.12
6.12.1 Invert Signal Polarity (INV_AINX)
INV_AOUT8
AINx_VOL7
Reserved
7
7
7
DAC Channel Invert (Address 10h)
AINX Volume Control (Address 11h-16h)
ADC Channel Invert (Address 17h)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
Default = 00h
Function:
The level of AIN1 - AIN6 can be adjusted in 0.5 dB increments as dictated by the ADC Soft and Zero Cross
bits (ADC_SZC[1:0]) from +24 to -64 dB. Levels are decoded in two’s complement, as shown in
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
INV_AOUT7
AINx_VOL6
Reserved
6
6
6
INV_AOUT6
AINx_VOL5
INV_AIN6
5
5
5
Table 15. Example AIN Volume Settings
Binary Code
0000 0000
1000 0000
0011 0000
0111 1111
1111 1110
1111 1111
···
···
···
INV_AOUT5
AINx_VOL4
INV_AIN5
4
4
4
INV_AOUT4
AINx_VOL3
INV_AIN4
Volume Setting
3
3
3
-0.5 dB
+24 dB
+24 dB
-64 dB
-1 dB
0 dB
···
···
···
INV_AOUT3
AINx_VOL2
INV_AIN3
2
2
2
INV_AOUT2
AINx_VOL1
INV_AIN2
1
1
1
CS42448
INV_AOUT1
AINx_VOL0
INV_AIN1
Table
DS648F3
0
0
0
15.