LTM4604AEV#PBF Linear Technology, LTM4604AEV#PBF Datasheet - Page 11

• Manufacturer Part Number: LTM4604AEV#PBF
• Description: IC UMODULE DC/DC LV 4A 66-LGA
• Manufacturer: Linear Technology
• Series: µModuler
• Type: Point of Load (POL) Non-Isolatedr

Specifications of LTM4604AEV#PBF

• Design Resources: LTM4604A Spice Model
• Output: 0.8 ~ 5 V
• Number Of Outputs: 1
• Power (watts): 20W
• Mounting Type: Surface Mount
• Voltage - Input: 2.38 ~ 5.5 V
• Package / Case: 66-LGA
• 1st Output: 0.8 ~ 5 VDC @ 4A
• Size / Dimension: 0.59" L x 0.35" W x 0.09" H (15mm x 9mm x 2.3mm)
• Power (watts) - Rated: 20W
• Operating Temperature: -40°C ~ 125°C
• Efficiency: 95%
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• 3rd Output: -
• 2nd Output: -

APPLICATIONS INFORMATION
Ratio metric modes of tracking can be achieved by select-
ing different resistor values to change the output tracking
ratio. The master output must be greater than the slave
output for the tracking to work. Linear Technology Tracker
Cad26 can be used to implement different tracking sce-
narios. The Master and Slave data inputs can be used to
implement the correct resistor values for coincident or
ratio tracking. The master and slave regulators require
load current for tracking down.
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±7.5% window around the regulation point.
COMP Pin
The pin is the external compensation pin. The module has
already been internally compensated for all output voltages.
Table 4 is provided for most application requirements.
The Linear Technology μModule Power Design Tool can
be provided for other control loop optimizations.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
Figure 4. 1.2V Power Loss
1
LOAD CURRENT (A)
2
3
5V TO 1.2V
POWER LOSS
3.3V TO 1.2V
POWER LOSS
4
4604A F04
5
Parallel Operation
The LTM4604A device is an inherently current mode
controlled device. Parallel modules will have very good
current sharing. This will balance the thermals on the
design. Figure 16 shows a schematic of the parallel design.
The voltage feedback changes with the variable N as more
modules are paralleled. The equation:
N is the number of paralleled modules.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 4 and 5 can be used
in coordination with the load derating curves in Figures
6 through 13 for calculating an approximate θ
module with and without heat sinking methods with vari-
ous airfl ow conditions. Thermal models are derived from
several temperature measurements at the bench, and are
correlated with thermal analysis software. Tables 2 and
3 provide a summary of the equivalent θ
conditions. These equivalent θ
to the measured values and improve with air fl ow. The
maximum junction temperature is monitored while the
derating curves are derived.
V
OUT
=
0 8
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
.
0
V
•
Figure 5. 2.5V Power Loss
4 99
1
.
N
LOAD CURRENT (A)
R
k
FB
+
2
R
FB
JA
3
parameters are correlated
5V TO 2.5V
POWER LOSS
3.3V TO 2.5V
POWER LOSS
LTM4604A
4
4604A F05
JA
5
for the noted
JA
11
for the
4604af