MT9HVF12872KY-53EA1 Micron Technology Inc, MT9HVF12872KY-53EA1 Datasheet
MT9HVF12872KY-53EA1
Specifications of MT9HVF12872KY-53EA1
Related parts for MT9HVF12872KY-53EA1
MT9HVF12872KY-53EA1 Summary of contents
Page 1
DDR2 SDRAM VLP Mini-RDIMM MT9HVF6472(P)K – 512MB MT9HVF12872(P)K – 1GB For component data sheets, refer to Micron’s Web site: Features • 244-pin, very low profile mini registered dual in-line memory module (VLP Mini-RDIMM) • Fast data transfer rates: PC2-3200, PC2-4200, ...
Page 2
... Notes: 1. Data sheets for the base devices can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown), designating component and PCB revisions. Consult factory for current revision codes. Example: MT9HVF12872KY-40EE1. PDF: 09005aef81c9620b/Source: 09005aef81c961ec HVF9C64_128x72K.fm - Rev. C 3/07 EN ...
Page 3
Pin Assignments and Descriptions Table 5: Pin Assignments 244-Pin VLP Mini-RDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol REF DQ24 DQ0 34 DQ25 65 4 DQ1 ...
Page 4
Table 6: Pin Descriptions Symbol Type ODT0 Input On-die termination: ODT (registered HIGH) enables termination resistance internal to (SSTL_18) the DDR2 SDRAM. When enabled, ODT is only applied to each of the following pins: DQ, DQS, DQS#, RDQS, RDQS#, CB, ...
Page 5
Table 6: Pin Descriptions (continued) Symbol Type V Supply SSTL_18 reference voltage. REF V Supply Ground Supply Serial EEPROM positive power supply: +1.7V to +3.6V. DDSPD NC – No connect: These pins should be left unconnected. RFU – ...
Page 6
Functional Block Diagram Figure 2: Functional Block Diagram RS0# DQS0 DQS0# DM0/DQS9 NC/DQS9# DQS1 DQS1# DM1/DQS10 NC/DQS10# DQS2 DQS2# DM2/DQS11 NC/DQS11# DQS3 DQS3# DM3/DQS12 NC/DQS12# DQS8 DQS8# DM8/DQS17 NC/DQS17# S0# BA0–BA1/BA2 A0–A15 RAS# CAS# WE# CKE0 ODT0 ...
Page 7
... READs and by the memory controller during WRITEs. DQS is edge- aligned with data for READs and center-aligned with data for WRITEs. DDR2 SDRAM modules operate from a differential clock (CK and CK#); the crossing of CK going HIGH and CK# going LOW will be referred to as the positive edge of CK. ...
Page 8
... Micron encourages designers to simulate the performance of the module to achieve optimum values. Simulations are significantly more accurate and realistic than a gross estimation of module capacitance when inductance and delay parameters associated with trace lengths are used in simulations. JEDEC modules are currently designed using simulations to close timing budgets. Component AC Operating Specifications Recommended AC operating conditions are given in the DDR2 component data sheets. Component specifications are available on Micron’ ...
Page 9
I Specifications DD Table 9: I Specifications and Conditions – 512MB DD Values shown for MT47H64M8 DDR2 SDRAM only and are computed from values specified in the 512Mb (64 Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge ...
Page 10
Table 10: I Specifications and Conditions – 1GB DD Values shown for MT47H128M8 DDR2 SDRAM only and are computed from values specified in the 1Gb (128 Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge current ...
Page 11
Register and PLL Specifications Table 11: Register Specifications SSTU32865 device or equivalent JESD82-19 Parameter Symbol DC high-level input voltage DC low-level input voltage high-level IH AC ...
Page 12
Table 12: PLL Specifications CU877 device or equivalent JESD82-8.01 Parameter Symbol DC high-level input V IH voltage DC low-level input V IL voltage V Input voltage (limits high-level input V IH voltage V DC low-level input IL voltage ...
Page 13
Table 14: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input leakage current: ...
Page 14
Table 16: Serial Presence-Detect Matrix Byte Description 0 Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on assembly 4 Number of column addresses on ...
Page 15
Table 16: Serial Presence-Detect Matrix (continued) Byte Description 27 MIN row precharge time, 28 MIN row active-to-row active, 29 MIN RAS#-to-CAS# delay, 30 MIN active-to-precharge time, 31 Module rank density 32 Address and command setup time, 33 Address and command ...
Page 16
Table 16: Serial Presence-Detect Matrix (continued) Byte Description 63 Checksum for bytes 0–62 ECC/ECC and parity 64 Manufacturer’s JEDEC ID code 65–71 Manufacturer’s JEDEC ID code 72 Manufacturing location 73–90 Module part number (ASCII) 91 PCB identification code 92 Identification ...
Page 17
Module Dimensions Figure 3: 244-Pin DDR2 VLP Mini-RDIMM 1.00 (0.039 1.80 (0.071 6.00 (0.236) TYP 1.00 (0.039) 0.60 (0.024) TYP PIN 1 TYP 2.00 (0.079) TYP 42.90 (1.689) TYP U8 U9 3.30 (0.130) TYP ...