IDT72P51369L6BBI8 IDT, Integrated Device Technology Inc, IDT72P51369L6BBI8 Datasheet - Page 73

• Manufacturer Part Number: IDT72P51369L6BBI8
• Description: IC FLOW CTRL 36BIT 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51369L6BBI8

• Configuration: Dual
• Density: 4.5Mb
• Access Time (max): 3.7ns
• Word Size: 36b
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 166MHz
• Supply Current: 150mA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51369L6BBI8

Cycle:
*A* Queue 5 of Device 1 is selected on the write port. A queue within Device 2 had previously been selected. The PAF output of device 1 is High-Impedance.
*B* No write occurs, WEN is HIGH.
*C* No write occurs, WEN is HIGH.
*D* No write occurs, WEN is HIGH.
*E* Word, Wd-m is written into Q5 causing the PAF flag to go from LOW to HIGH. The flag latency is 3 WCLK cycles + t
*F* Queue 9 in device 1 is now selected for write operations. This queue is not almost full, therefore the PAF flag will update after a 3 WCLK + t
*G* The PAF flag goes LOW based on the write 2 cycles earlier.
*H* No write occurs, WEN is HIGH.
*I* The PAF flag goes HIGH due to the queue switch to Q9.
NOTE:
1. The waveform shows the PAF flag operation when no queue switch occurs and a queue is selected on both the write and read ports is being written to then read
2. Flag Latencies:
3. If t
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592
WRADD
WADEN
PAF
(Device 1)
PAF
(Device 2)
WCLK
RCLK
WCLK
from at the almost full boundary.
Assertion: 2*WCLK + t
De-assertion: t
WEN
WEN
REN
PAF
Din
SKEW2
HIGH-Z
t
is violated there will be one extra WCLK cycle.
CLKL
t
AS
t
QS
SKEW2
D
1
*A*
Q
5
+ WCLK + t
t
QH
WAF
t
AH
t
ENS
WAF
*B*
D - (m+1) words in Queue
t
CLKL
t
ENH
*C*
Figure 58. Almost Full Flag Timing and Queue Switch
(
2)
*D*
Figure 59. Almost Full Flag Timing
t
FFHZ
t
AFLZ
t
ENS
t
DS
D
W
1
*E*
D-m
Q
5
t
73
WAF
t
t
DH
ENH
t
t
AS
QS
t
D
ENS
*F*
1
Q
1
9
t
QH
t
t
AH
SKEW2
*G*
2
t
ENH
D - m words in Queue
t
WAF
WAF
.
*H*
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
WAF
*I*
t
WAF
latency.
AUGUST 4, 2005
D-(m+1) words
in Queue
*J*
6716 drw67
t
WAF
6716 drw66