IDT72P51369L6BBI8 IDT, Integrated Device Technology Inc, IDT72P51369L6BBI8 Datasheet - Page 48

• Manufacturer Part Number: IDT72P51369L6BBI8
• Description: IC FLOW CTRL 36BIT 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51369L6BBI8

• Configuration: Dual
• Density: 4.5Mb
• Access Time (max): 3.7ns
• Word Size: 36b
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 166MHz
• Supply Current: 150mA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51369L6BBI8

the PR flag will again gone active, then reads from the new packet may follow
after the current packet has been completely read out.
of packet markers and regard data in between the TSOP and TEOP as a full
packet of data. The packet monitoring has no limitation as to how many packets
are written into a queue, the only constraint is the depth of the queue. Note, there
is a minimum allowable packet size of four words, inclusive of the TSOP marker
and TEOP marker.
marker.
regards data between the first TSOP and the first subsequent TEOP as the full
packet. The same is true for TEOP; a second consecutive TEOP mark is ignored.
On the read side the user should regard a packet as being between the first
RSOP and the first subsequent REOP and disregard consecutive RSOP
markers and/or REOP markers. This is why a TEOP may be written twice, using
the second TEOP as the “filler” word.
End of Packet” (AEOP) marker. For example, the AEOP can be assigned to
data input bit D33. The purpose of this AEOP marker is to provide an indicator
that the end of packet is a fixed (known) number of reads away from the end
of packet. This is a useful feature when due to latencies within the system,
monitoring the REOP marker alone does not prevent “over reading” of the data
from the queue selected. For example, an AEOP marker set 4 writes before the
TEOP marker provides the device connected to the read port with and “almost
end of packet” indication 4 cycles before the end of packet.
determined by user requirements or latencies involved in the system.
TABLE 10 — PACKET MODE VALID BYTE FOR x36 BIT WORD CONFIGURATION
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592
The packet counters therefore look for start of packet markers followed by end
The packet logic does expect a TSOP marker to be followed by a TEOP
If a second TSOP marker is written after a first, it is ignored and the logic
As an example, the user may also wish to implement the use of an “Almost
The AEOP can be set any number of words before the end of packet
TMOD1 (D33)
RMOD1 (Q33)
0
0
1
1
BYTE D
TMOD2 (D32)
RMOD2 (Q32)
BYTE C
0
1
0
1
48
57, Data Output (Receive) Packet Mode of Operation.
PACKET MODE – MODULO OPERATION
modulo bits, they are only informational bits that are passed through with the
respective data byte(s).
may also want to consider the implementation of “Modulo” operation or “valid
byte marking”. Modulo operation may be useful when the packets being
transferred through a queue are in a specific byte arrangement even though
the data bus width is 36 bits. In Modulo operation the user can concatenate bytes
to form a specific data string through the multi-queue device. A possible scenario
is where a limited number of bytes are extracted from the packet for either
analysis or filtered for security protection. This will only occur when the first 36
bit word of a packet is written in and the last 36 bit word of packet is written in.
The modulo operation is a means by which the user can mark and identify specific
data within the Queue.
(transmit modulo bit 1, TMOD1) can be used as data markers. An example of
this could be to use D32 and D33 to code which bytes of a word are part of the
packet that is also being marked as the “Start of Marker” or “End of Marker”.
Conversely on the read port when reading out these marked words, data
outputs Q32 (receive modulo bit 2, RMOD2) and Q33 (receive modulo bit 1,
RMOD1) will pass on the byte validity information for that word. Refer to Table
10 for one example of how the modulo bits may be setup and used. See Figure
57, Data Output (Receive) Packet Mode of Operation.
See Figure 55, Reading in Packet Mode during a Queue Change, Figure
The internal packet ready control logic performs no operation on these
When utilizing the multi-queue flow-control device in packet mode, the user
On the write port data input bits, D32 (transmit modulo bit 2, TMOD2) and D33
BYTE B
VALID BYTES
A, B, C, D
A
A, B
A, B, C
BYTE A
6716 drw19
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
AUGUST 4, 2005