IDT89HPES8T5ZHBCG IDT, Integrated Device Technology Inc, IDT89HPES8T5ZHBCG Datasheet - Page 5

• Manufacturer Part Number: IDT89HPES8T5ZHBCG
• Description: IC PCI SW 8LANE 5PORT 324-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT89HPES8T5ZHBCG

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 89HPES8T5ZHBCG

IDT 89HPES8T5 Data Sheet
SSMBADDR[5,3:1]
PEREFCLKP[2:1]
PEREFCLKN[2:1]
MSMBADDR[4:1]
MSMBCLK
MSMBDAT
REFCLKM
SSMBCLK
SSMBDAT
PE4RP[0]
PE4RN[0]
PE5RP[0]
PE5RN[0]
PE4TP[0]
PE4TN[0]
PE5TP[0]
PE5TN[0]
Signal
Signal
Type
Type
I/O
I/O
I/O
I/O
O
O
I
I
I
I
I
I
Table 2 PCI Express Interface Pins (Part 2 of 2)
PCI Express Port 4 Serial Data Receive. Differential PCI Express receive
pair for port 4.
PCI Express Port 4 Serial Data Transmit. Differential PCI Express trans-
mit pair for port 4.
PCI Express Port 5 Serial Data Receive. Differential PCI Express receive
pair for port 5.
PCI Express Port 5 Serial Data Transmit. Differential PCI Express trans-
mit pair for port 5.
PCI Express Reference Clock. Differential reference clock pair input. This
clock is used as the reference clock by on-chip PLLs to generate the clocks
required for the system logic and on-chip SerDes. The frequency of the dif-
ferential reference clock is determined by the REFCLKM signal.
PCI Express Reference Clock Mode Select. This signal selects the fre-
quency of the reference clock input.
0x0 - 100 MHz
0x1 - 125 MHz
Master SMBus Address. These pins determine the SMBus address of the
serial EEPROM from which configuration information is loaded.
Master SMBus Clock. This bidirectional signal is used to synchronize
transfers on the master SMBus. It is active and generating the clock only
when the EEPROM or I/O Expanders are being accessed.
Master SMBus Data. This bidirectional signal is used for data on the mas-
ter SMBus.
Slave SMBus Address. These pins determine the SMBus address to
which the slave SMBus interface responds.
Slave SMBus Clock. This bidirectional signal is used to synchronize trans-
fers on the slave SMBus.
Slave SMBus Data. This bidirectional signal is used for data on the slave
SMBus.
Table 3 SMBus Interface Pins
5 of 31
Name/Description
Name/Description
March 27, 2008