LTC3832EGN Linear Technology, LTC3832EGN Datasheet - Page 13

• Manufacturer Part Number: LTC3832EGN
• Description: IC DC/DC CTRLR SYNC STPDN 16SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3832EGN

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 2.5V
• Current - Output: 20A
• Frequency - Switching: 300kHz
• Voltage - Input: 3 ~ 8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
Diagram). This increases the G2 on-time and allows the
charge pump capacitors to be refreshed.
For applications using an external supply to PV
supply must also be higher than V
ensure normal operation.
For applications with a 5V or higher V
be tied to V
supplied using a doubling charge pump as shown in
Figure 9. This circuit provides 2V
is ON.
Power MOSFETs
Two N-channel power MOSFETs are required for most
LTC3832 circuits. These should be selected based
primarily on threshold voltage and on-resistance consid-
erations. Thermal dissipation is often a secondary con-
cern in high efficiency designs. The required MOSFET
threshold should be determined based on the available
power supply voltages and/or the complexity of the gate
drive charge pump scheme. In 3.3V input designs where
an auxiliary 12V supply is available to power PV
PV
= 5V or 6V can be used with good results. The current
drawn from this supply varies with the MOSFETs used
and the LTC3832’s operating frequency, but is generally
less than 50mA.
LTC3832 applications that use 5V or lower V
a doubling/tripling charge pump to generate PV
PV
USE FOR V
CC2
CC2
OPTIONAL
D
12V
1N5242
Z
, standard MOSFETs with R
, do not provide enough gate drive voltage to fully
IN
IN
LTC3832
7V
if a logic level MOSFET is used. PV
Figure 9. Doubling Charge Pump
PV
CC2
U
PV
CC1
G1
G2
U
MBR0530T1
0.1 F
IN
DS(ON)
– V
W
CC
IN
V
F
by at least 2.5V to
IN
supply, PV
to PV
Q1
Q2
specified at V
L
IN
O
CC1
voltage and
U
CC1
+
while Q1
CC1
CC1
CC1
CC2
can be
3832 F09
, this
C
OUT
and
and
can
V
OUT
GS
enhance standard power MOSFETs. Under this condition,
the effective MOSFET R
the dissipation in the FETs and reducing efficiency. Logic
level FETs are the recommended choice for 5V or lower
voltage systems. Logic level FETs can be fully enhanced
with a doubler/tripling charge pump and will operate at
maximum efficiency.
After the MOSFET threshold voltage is selected, choose the
R
allowable power dissipation and maximum output current.
In a typical LTC3832 circuit, operating in continuous mode,
the average inductor current is equal to the output load
current. This current flows through either Q1 or Q2 with the
power dissipation split up according to the duty cycle:
The R
be calculated by rearranging the relation P = I
P
efficiency or allowable thermal dissipation. A typical high
efficiency circuit designed for 3.3V input and 2.5V at 10A
output might allow no more than 3% efficiency loss at full
load for each MOSFET. Assuming roughly 90% efficiency
at this current level, this gives a P
and a required R
R
R
MAX
DS(ON)
DS ON Q
DS ON Q
(2.5V)(10A/0.9)(0.03) = 0.83W per FET
DC Q
DC Q
R
R
(
(
DS ON Q
DS ON Q
DS(ON)
( )
(
should be calculated based primarily on required
(
(
)
)
1
2
based on the input voltage, the output voltage,
1
2
)
)
)
1
2
required for a given conduction loss can now
V
1
DC Q
DC Q
V
OUT
–
IN
( .
( ) • (
( .
(
V
DS(ON)
3 3
3 3
P
( .
V
P
OUT
2 5
( .
MAX Q
1
IN
MAX Q
2
3 3
LTC3832/LTC3832-1
V
) • (
V
) • ( .
V
– .
( )
V
I
(
)(
LOAD
I
DS(ON)
of:
LOAD
) • ( .
2 5
1
10
2
V
0 83
)
IN
0 83
A
V
)
–
V
)
2
)
)(
W
2
2
IN
may be quite high, raising
V
10
OUT
)
W
V
A
MAX
(
V
)
OUT
V
)
IN
0 011
2
IN
.
•
value of:
V
–
P
• (
IN
0 034
MAX Q
V
I
.
LOAD
OUT
•
P
( )
MAX Q
2
) • (
1
R.
)
2
sn3832 3832fs
(
13
I
LOAD
2
)
)
2