LTC3832-1ES8#TR Linear Technology, LTC3832-1ES8#TR Datasheet - Page 6

• Manufacturer Part Number: LTC3832-1ES8#TR
• Description: IC CTRLR DC/DC SYNC BUCK 8-SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3832-1ES8#TR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 2.5V
• Current - Output: 20A
• Frequency - Switching: 300kHz
• Voltage - Input: 3 ~ 8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

PI FU CTIO S
LTC3832/LTC3832-1
G1 (Pin 1/Pin 1): Top Gate Driver Output. Connect this pin
to the gate of the upper N-channel MOSFET, Q1. This
output swings from PGND to PV
is high or during shutdown mode.
PV
this pin to a potential of at least V
potential can be generated using an external supply or
charge pump.
PGND (Pin 3/Pin 3): Power Ground. Both drivers return to
this pin. Connect this pin to a low impedance ground in
close proximity to the source of Q2. Refer to the Layout
Consideration section for more details on PCB layout
techniques. The LTC3832-1 has PGND and GND tied
together internally at Pin 3.
GND (Pin 4/Pin 3): Signal Ground. All low power internal
circuitry returns to this pin. To minimize regulation errors
due to ground currents, connect GND to PGND right at the
LTC3832.
SENSE
pins connect to the internal resistor divider and input of the
error amplifier. To use the internal divider to set the output
voltage to 2.5V, connect SENSE
of the output capacitor and SENSE
nal. FB should be left floating. To use an external resistor
TYPICAL PERFOR A CE CHARACTERISTICS
6
CC1
U
80
70
60
50
40
30
20
10
0
0
PV
vs Gate Capacitance
T
(Pin 2/Pin 2): Power Supply Input for G1. Connect
A
–
CC
GATE CAPACITANCE AT G1 AND G2 (nF)
, FB, SENSE
= 25 C
1
U
Supply Current
2
PV
3
CC1,2
4
= 12V
5
U
+
(Pins 5, 6, 7/Pin 4): These three
PV
6
CC1,2
7
(LTC3832/LTC3832-1)
W
= 5V
8
9
3832 G19
+
CC1
U
to the positive terminal
–
10
IN
to the negative termi-
. It remains low if G2
+ V
GS(ON)(Q1)
200
180
160
140
120
100
80
60
40
20
0
G1 Rise/Fall Time
vs Gate Capacitance
0
T
A
GATE CAPACITANCE AT G1 AND G2 (nF)
= 25 C
1
. This
2
t
r
AT PV
t
f
AT PV
3
CC1,2
4
CC1,2
t
= 5V
5
r
divider to set the output voltage, float SENSE
and connect the external resistor divider to FB. The internal
resistor divider is not included in the LTC3832-1.
SHDN (Pin 8/NA): Shutdown. A TTL compatible low level
at SHDN for longer than 100 s puts the LTC3832 into
shutdown mode. In shutdown, G1 and G2 go low, all
internal circuits are disabled and the quiescent current
drops to 10 A max. A TTL compatible high level at SHDN
allows the part to operate normally. This pin also doubles
as an external clock input to synchronize the internal
oscillator with an external clock. The shutdown function is
disabled in the LTC3832-1.
SS (Pin 9/Pin 5): Soft-Start. Connect this pin to an external
capacitor, C
LTC3832 goes into current limit, C
reduce the duty cycle. C
during power-up, the current through Q1 will not exceed
the current limit level.
COMP (Pin 10/Pin 6): External Compensation. This pin
internally connects to the output of the error amplifier and
input of the PWM comparator. Use a RC + C network at this
pin to compensate the feedback loop to provide optimum
transient response.
AT PV
= 5V
t
f
6
AT PV
CC1,2
7
CC1,2
= 12V
8
= 12V
3832 G20
9
SS
10
, to implement a soft-start function. If the
50mV/DIV
2AV/DIV
I
V
LOAD
OUT
SS
Transient Response
must be selected such that
SS
50 s/DIV
is discharged to
+
and SENSE
sn3832 3832fs
3832 G21
–