LTC3832-1ES8#TR Linear Technology, LTC3832-1ES8#TR Datasheet - Page 11

IC CTRLR DC/DC SYNC BUCK 8-SOIC

LTC3832-1ES8#TR

Manufacturer Part Number
LTC3832-1ES8#TR
Description
IC CTRLR DC/DC SYNC BUCK 8-SOIC
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3832-1ES8#TR

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
2.5V
Current - Output
20A
Frequency - Switching
300kHz
Voltage - Input
3 ~ 8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC3832-1ES8#TRLTC3832-1ES8
Manufacturer:
LT
Quantity:
10 000
APPLICATIO S I FOR ATIO
Connecting a 82k resistor from FREQSET to ground
forces 15 A out of the pin, causing the internal oscillator
to run at approximately 450kHz. Forcing an external 20 A
current into FREQSET cuts the internal frequency to
100kHz. An internal clamp prevents the oscillator from
running slower than about 50kHz. Tying FREQSET to V
forces the chip to run at this minimum speed. The
LTC3832-1 does not have this frequency adjustment
function.
Shutdown
The LTC3832 includes a low power shutdown mode,
controlled by the logic at the SHDN pin. A high at SHDN
allows the part to operate normally. A low level at SHDN for
more than 100 s forces the LTC3832 into shutdown
mode. In this mode, all internal switching stops, the COMP
and SS pins pull to ground and Q1 and Q2 turn off. The
LTC3832 supply current drops to <10 A, although off-
state leakage in the external MOSFETs may cause the total
V
temperatures. If SHDN returns high, the LTC3832 reruns
a soft-start cycle and resumes normal operation. The
LTC3832-1 does not have this shutdown function.
External Clock Synchronization
The LTC3832 SHDN pin doubles as an external clock
input for applications that require a synchronized clock.
An internal circuit forces the LTC3832 into external
synchronization mode if a negative transition at the SHDN
pin is detected. In this mode, every negative transition on
the SHDN pin resets the internal oscillator and pulls the
ramp signal low, this forces the LTC3832 internal oscil-
lator to lock to the external clock frequency. The LTC3832-1
does not have this external synchronization function.
The LTC3832 internal oscillator can be externally synchro-
nized from 100kHz to 500kHz. Frequencies above 300kHz
can cause a decrease in the maximum obtainable duty
cycle as rise/fall time and propagation delay take up a
larger percentage of the switch cycle. Circuits using these
frequencies should be checked carefully in applications
where operation near dropout is important—like 3.3V to
2.5V converters. The low period of this clock signal must
not be >100 s, or else the LTC3832 enters shutdown
mode.
IN
current to be some what higher, especially at elevated
U
U
W
U
CC
SYNC METHOD
Figure 5 describes the operation of the conventional
synchronization function. A negative transition at the
SHDN pin forces the internal ramp signal low to restart a
new PWM cycle. Notice that the ramp amplitude is lowered
as the external clock frequency goes higher. The effect of
this decrease in ramp amplitude increases the open-loop
gain of the controller feedback loop. As a result, the loop
crossover frequency increases and it may cause the feed-
back loop to be unstable if the phase margin is insufficient.
To overcome this problem, the LTC3832 monitors the
peak voltage of the ramp signal and adjusts the oscillator
charging current to maintain a constant ramp peak.
TERMINATION
Input Supply Considerations/Charge Pump
The LTC3832 requires four supply voltages to operate: V
for the main power input, PV
gate drive and a clean, low ripple V
internal circuitry (Figure 6). The LTC3832-1 has the PV
and V
This pin, brought out as V
ripple requirements as the LTC3832, but must also be able
to supply the gate drive current to Q2.
UNDER SYNC
TRADITIONAL
KEEPS RAMP
WITH EARLY
AMPLITUDE
CONSTANT
LTC3832
RAMP
RAMP AMPLITUDE
CC
pins tied together inside the package (Figure 7).
Figure 5. External Synchronization Operation
SHDN
FREE RUNNING
ADJUSTED
RAMP SIGNAL
300kHz
LTC3832/LTC3832-1
CC
CC1
/PV
and PV
CC2
CC
, has the same low
for the LTC3832
CC2
WITH EXT SYNC
RAMP SIGNAL
for MOSFET
sn3832 3832fs
11
3832 F05
CC2
IN

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