L6712QTR STMicroelectronics, L6712QTR Datasheet - Page 24

• Manufacturer Part Number: L6712QTR
• Description: IC CTRLR DC/DC 2PH SYNC 36VFQFPN
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of L6712QTR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.9 ~ 3.3 V
• Current - Output: 2A
• Frequency - Switching: 150kHz
• Voltage - Input: 12V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 36-VFQFN, 36-VFQFPN
• Power - Output: 3.5W
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4219-2

L6712A L6712
implemented) or in the same way to the LS mosfets Source pin. GATEx and PHASEx connections (and
also PGND when no power ground plane is implemented) must also be designed to handle current peaks
in excess of 2A (30 mils wide is suggested).
Gate resistors of few ohms help in reducing the power dissipated by the IC without compromising the sys-
tem efficiency.
The placement of other components is also important:
Figure 20. Device orientation (left) and sense nets routing (right).
■
Remote Amplifier: Place the external resistors near the device to minimize noise injection and refer to
SGND. The connections for these resistors (from the remote load) must be routed as parallel nets in order
to compensate losses along the output power traces and also to avoid the pick-up of any noise. Connect-
ing these pins in points far from the load will cause a non-optimum load regulation, increasing output tol-
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– The bootstrap capacitor must be placed as close as possible to the BOOTx and PHASEx pins to min-
– Decoupling capacitor from VCC and SGND placed as close as possible to the involved pins.
– Decoupling capacitor from VCCDR and PGND placed as close as possible to those pins. This capac-
– Refer to SGND all the sensible components such as frequency set-up resistor (when present) and
– Connect SGND to PGND plane on a single point to improve noise immunity. Connect at the load side
– An additional 100nF ceramic capacitor is suggested to place near HS mosfet drain. This helps in re-
– PHASE pin spikes. Since the HS mosfet switches in hard mode, heavy voltage spikes can be ob-
– Boot Capacitor Extra Charge. Systems that do not use Schottky diodes in parallel to the LS mosfet
Sense Connections.
imize the loop that is created.
itor sustains the peak currents requested by the low-side mosfet drivers.
Remote Amplifier Divider.
(output capacitor) if Remote Sense is not implemented to avoid undesirable load regulation effect.
ducing noise.
served on the PHASE pins. If these voltage spikes overcome the max breakdown voltage of the pin,
the device can absorb energy and it can cause damages. The voltage spikes must be limited by prop-
er layout, the use of gate resistors, Schottky diodes in parallel to the low side mosfets and/or snubber
network on the low side mosfets, to a value lower than 26V, for 20ns, at F
might show big negative spikes on the phase pin. This spike can be limited as well as the positive
spike but has an additional consequence: it causes the bootstrap capacitor to be over-charged. This
extra-charge can cause, in the worst case condition of maximum input voltage and during particular
transients, that boot-to-phase voltage overcomes the abs. max. ratings also causing device failures.
It is then suggested in this cases to limit this extra-charge by:
– adding a small resistor in series to the boot diode (one resistor can be enough for all the diodes if
– using low capacitance diodes.
placed upstream the diode anode)
Towards HS mosfet
Towards HS mosfet
Towards LS mosfet
(30 mils wide)
(30 mils wide)
(30 mils wide)
To regulated output
To LS mosfet
To LS mosfet
(or sense resistor)
(or sense resistor)
SW
of 600kHz max.
ST L6917