MAX17004ETJ+ Maxim Integrated Products, MAX17004ETJ+ Datasheet - Page 34

• Manufacturer Part Number: MAX17004ETJ+
• Description: IC PS CTRLR FOR NOTEBOOKS 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17004ETJ+

• Applications: Controller, Notebook Computers
• Voltage - Input: 6 ~ 26 V
• Number Of Outputs: 4
• Voltage - Output: 3.3V, 5V, 2 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

where V
the charge and discharge paths, respectively. A rea-
sonable minimum value for h is 1.5, while the absolute
minimum input voltage is calculated with h = 1.
The MAX17003/MAX17004 controllers include a mini-
mum on-time specification, which determines the maxi-
mum input operating voltage that maintains the
selected switching frequency (see the Electrical
Characteristics table). Operation above this maximum
input voltage results in pulse-skipping operation,
regardless of the operating mode selected by SKIP. At
the beginning of each cycle, if the output voltage is still
above the feedback threshold voltage, the controller
does not trigger an on-time pulse, effectively skipping a
cycle. This allows the controller to maintain regulation
above the maximum input voltage, but forces the con-
troller to effectively operate with a lower switching fre-
quency. This results in an input threshold voltage at
which the controller begins to skip pulses (V
where f
Careful PCB layout is critical to achieving low switching
losses and clean, stable operation. The switching
power stage requires particular attention (Figure 9). If
possible, mount all the power components on the top
side of the board, with their ground terminals flush
against one another. Follow these guidelines for good
PCB layout:
•
•
High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
34
V
IN MIN
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PCBs (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing
PCB traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
______________________________________________________________________________________
(
OSC
CHG
)
=
V
V
is the switching frequency selected by FSEL.
IN SKIP
OUT
and V
(
+
DIS
)
V
=
CHG
V
are the parasitic voltage drops in
OUT
+
PCB Layout Guidelines
⎛
⎜
⎝
h
f
⎛
⎜
⎝
OSC ON MIN
D
Maximum Input Voltage
MAX
1
t
1
(
−
1
⎞
⎟
⎠
)
(
V
⎞
⎟
⎠
OUT
IN(SKIP)
+
V
DIS
):
)
•
•
•
Place the power components first, with ground termi-
nals adjacent (N
anode). If possible, make all these connections on the
top layer with wide, copper-filled areas.
Mount the controller IC adjacent to the low-side MOSFET,
preferably on the back side opposite N
order to keep LX_, GND, DH_, and the DL_ gate-drive
lines short and wide. The DL_ and DH_ gate traces must
be short and wide (50 mils to 100 mils wide if the MOSFET
is 1in from the controller IC) to keep the driver impedance
low and for proper adaptive dead-time sensing.
Group the gate-drive components (BST_ capacitor,
LDO5 bypass capacitor) together near the controller IC.
Make the DC-DC controller ground connections as
shown in Figures 1 and 9. This diagram can be viewed
as having two separate ground planes: power ground,
where all the high-power components go, and an ana-
log ground plane for sensitive analog components. The
analog ground plane and power ground plane must
meet only at a single point directly at the IC.
Connect the output power planes directly to the output
filter capacitor positive and negative terminals with mul-
tiple vias. Place the entire DC-DC converter circuit as
close to the load as is practical.
Minimize current-sensing errors by connecting
CSH_ and CSL_ directly across the current-sense
resistor (R
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
Route high-speed switching nodes (BST_, LX_,
DH_, and DL_) away from sensitive analog areas
(REF, FB_, CSH_, CSL_).
SENSE_
L
_ source, C
).
Layout Procedure
IN
, C
OUT
L_
_, and D
and N
H_
L
in
_