ISL6263ACRZ Intersil, ISL6263ACRZ Datasheet - Page 10

• Manufacturer Part Number: ISL6263ACRZ
• Description: IC VREG 5BIT 1PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6263ACRZ

• Applications: Converter, Intel IMVP-6
• Voltage - Input: 5 ~ 25 V
• Number Of Outputs: 1
• Voltage - Output: 5 ~ 25 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 2. VID TABLE FOR INTEL IMVP-6+ V
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
x
VID3
x
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
VID2
10
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
x
VID1
x
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
CCGFX
V
1.28750
1.26175
1.23600
1.21025
1.18450
1.15875
1.13300
1.10725
1.08150
1.05575
1.03000
1.00425
0.97850
0.95275
0.92700
0.90125
0.87550
0.84975
0.82400
0.79825
0.77250
0.74675
0.72100
0.69525
0.66950
0.64375
0.61800
0.59225
0.56650
0.54075
0.51500
0.41200
CORE
CCGFX
(V)
0
ISL6263A
Theory of Operation
The R
The heart of the ISL6263A is Intersil’s Robust-Ripple-
Regulator (R
of fixed frequency PWM control, and variable frequency
hysteretic control that will simultaneously affect the PWM
switching frequency and PWM duty cycle in response to
input voltage and output load transients.
The term “Ripple” in the name “Robust-Ripple-Regulator”
refers to the synthesized voltage-ripple signal V
appears across the internal ripple-capacitor C
signal is a representation of the output inductor ripple
current. Transconductance amplifiers measuring the input
voltage of the converter and the output set-point voltage
V
A voltage window signal V
COMP pins by sourcing a current proportional to g
through a parallel network consisting of resistor R
capacitor C
along with similar companion signals are converted into
PWM pulses.
The PWM frequency is proportional to the difference in
amplitude between V
large-amplitude, low noise synthesized signals allows the
ISL6263A to achieve lower output ripple and lower phase
jitter than either conventional hysteretic or fixed frequency
PWM controllers. Unlike conventional hysteretic converters,
the ISL6263A has an error amplifier that allows the controller
to maintain tight voltage regulation accuracy throughout the
VID range from 0.41200V to 1.28750V.
Power-On Reset
The ISL6263A is disabled until the voltage at the VDD pin
has increased above the rising VDD power-on reset (POR)
V
disabled when the voltage at the VDD pin decreases below
the falling POR V
Start-Up Timing
Figure 4 shows the ISL6263A start-up timing. Once VDD has
ramped above V
pulling the VR_ON pin voltage above the input-high
threshold V
capacitor C
set-point as it is charged by the soft-start current source I
The V
V
counts 13 switching cycles, then changes the open-drain
output of the PGOOD pin to high impedance. During
soft-start, the regulator always operates in continuous
conduction mode (CCM).
SOFT
DD_THR
SOFT
CCGFX
, together produce the voltage-ripple signal V
3
voltage ramp to within 10% of the VID set-point then
Modulator
threshold voltage. The controller will become
VR_ONH
FSET.
SOFT
3
output voltage of the converter follows the
) Technology™. The R
DD_THR
DD_THF
begins slewing to the designated VID
The synthesized voltage-ripple signal V
. Approximately 100µs later, the soft-start
W
and V
, the controller can be enabled by
threshold voltage.
W
is created across the VW and
COMP
. Operating on these
3
modulator is a hybrid
R.
R
The V
FSET
that
m
R
July 8, 2010
V
.
soft
FN9284.3
R
and
SS
R
.