NCP1395APG ON Semiconductor, NCP1395APG Datasheet - Page 23

• Manufacturer Part Number: NCP1395APG
• Description: IC CTRLR PWM OVP 16DIP
• Manufacturer: ON Semiconductor

Specifications of NCP1395APG

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1MHz
• Duty Cycle: 52%
• Voltage - Supply: 10.3 V ~ 20 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Frequency-max: 1MHz
• Switching Frequency: 50 KHz to 1 MHz
• Mounting Style: Through Hole
• Duty Cycle (max): 52 %
• Input Voltage: 11V
• Frequency: 1MHz
• Supply Voltage Range: 20V
• Digital Ic Case Style: DIP
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +125°C
• Svhc: No SVHC (15-Dec-2010)
• Base Number: 1395
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

kind of constant current operation (CC) by taking the lead
when the other voltage loop is gone (CV). Due to the ORing
capability on the FB pin, the OPAMP regulates in constant
current mode. When the output reaches a low level close to
a complete short−circuit, the OPAMP output is maximum.
With a resistive divider on the slow fault, this condition can
be detected to trigger the delayed fault. If no OPAMP shall
be used, its input must be grounded.
Slow Input
When this input exceeds 1.0 V typical, the current source
Itimer turns on, charging the external capacitor Ctimer. If
the fault duration is long enough, when Ctimer voltage
Fast Input
as its voltage exceeds 1.0 V typical, all pulses are off and
maintained off as long as the fault is present. When the pin
is released, pulses come back without soft−start for the
A version, with soft−start for the B version.
observe the feedback pin via a resistive divided and thus
implement skip cycle operation. The resonant converter
can be designed to lose regulation in light load conditions,
forcing the FB level to increase. When it reaches the
programmed level, it triggers the fast fault input and stops
pulses. Then V
decreasing the feedback level which, in turn, unlocks the
pulses: Vout goes up again and so on: we are in skip cycle
mode.
In this figure, the internal OPAMP is used to perform a
On this circuit, the slow input goes to a comparator.
The fast input is not affected by a delayed action. As soon
Due to the low activation level of 1.0 V, this pin can
Figure 49. A resistor can easily program the capacitor discharge time.
out
slowly drops, the loop reacts by
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23
reaches the VtimerON level (4.0 V typical), then all pulses
are stopped. Itimer turns off and the capacitor slowly
discharges to ground via a resistor installed in parallel with
it. As a result, the designer can easily determine the time
during which the power supply stays locked by playing on
Rtimer. Now, when the timer capacitor voltage reaches
1.0 V typical (VtimerOFF), the comparator instructs the
internal logic to issues pulses as on a clean soft−start
sequence (soft−start is activated). Please note that the
discharge resistor cannot be lower than 4.0 V/Itimer,
otherwise the voltage on Ctimer will never reach the
turn−off voltage of 4.0 V.
and B are internally pulled down to ground.
Startup Behavior
consumption is kept to Istup, allowing to crank up the
converter via a resistor connected to the bulk capacitor.
When V
first and then output B. This sequence will always be the
same, whatever triggers the pulse delivery: fault, OFF to
ON etc… Pulsing the output A high first gives an
immediate charge of the bootstrap capacitor when an
integrated high voltage half−bridge driver is implemented
such as ON Semiconductor’s NCP5181. Then, the rest of
pulses follow, delivered at the highest switching value, set
by the resistor on pin 2. The soft−start capacitor ensures a
smooth frequency decrease to either the programmed
minimum value (in case of fault) or to a value
corresponding to the operating point if the feedback loop
closes first. Figure 51 shows typical signals evolution at
power on.
In both cases, when the fault is validated, both outputs A
When the V
CC
reaches the V
CC
voltage grows up, the internal current
resistors on the FB pin to the
Figure 50. Skip cycle can be
CC
implemented via two
ON level, output A goes high
fast fault input.
V
CC
FB
Fast Fault