IR3521MTRPBF International Rectifier, IR3521MTRPBF Datasheet - Page 11

• Manufacturer Part Number: IR3521MTRPBF
• Description: IC CTRL XPHASE3 SVID 32-MLPQ
• Manufacturer: International Rectifier
• Series: XPhase3™r

Specifications of IR3521MTRPBF

• Applications: Processor
• Current - Supply: 10mA
• Voltage - Supply: 4.75 V ~ 7.5 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: *
• Package: 32-Lead MLPQ
• Circuit: X-Phase Control IC
• Switch Freq (khz): 250kHz to 1.5MHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SYSTEM THEORY OF OPERATION
PWM Control Method
The PWM block diagram of the xPHASE3
with trailing edge modulation is used to provide system control. A voltage type error amplifier with high-gain and
wide-bandwidth, located in the Control IC, is used for the voltage control loop. The feed-forward control is
performed by the phase ICs as a result of sensing the input voltage (FET’s drain voltage). The PWM ramp slope
will change with the input voltage and automatically compensate for changes in the input voltage. The input voltage
can change due to variations in the silver box output voltage or due to the wire and PCB-trace voltage drop related
to changes in load current.
Frequency and Phase Timing Control
The oscillator (system clock) is located in the Control IC and is programmable from 250 kHz to 9 MHZ by an
external resistor. The control IC clock signal (CLKOUT) is connected to CLKIN of all the phase ICs. The phase
timing of the phase ICs is controlled by the daisy chain loop. The control IC phase clock output (PHSOUT) is
connected to the phase clock input (PHSIN) of the first phase IC, and PHSOUT of the first phase IC is connected to
PHSIN of the second phase IC, etc. The last phase IC (PHSOUT) is connected back to PHSIN of the control IC to
complete the loop. During power up, the control IC sends out clock signals from both CLKOUT and PHSOUT pins
and detects the feedback at PHSIN pin to determine the phase number and monitor any fault in the daisy chain
loop. Figure 5 shows the phase timing for a four phase converter.
IR35121CONTROL IC
ERROR
AMPLIFIER
Output 1 Only
IFB1
CLOCK GENERATOR
REMOTE SENSE
AMPLIFIER
+
-
VDRP1 AMP
IROSC
+
-
VDAC
+
-
VDRP1
IIN1
CLKOUT
PHSOUT
PHSIN
VOUT1
VDAC1
LGND
EAOUT1
FB1
RCP1
CCP13
CCP14
RFB12
CFB2
CDRP2
GATE DRIVE
VOLTAGE
RFB11
RDRP1
Figure 4 - PWM Block Diagram
TM
architecture is shown in Figure 4. Feed-forward voltage mode control
PHSOUT
PHSOUT
ISHARE
DACIN
ISHARE
DACIN
CLKIN
PHSIN
EAIN
CLKIN
PHSIN
EAIN
Page 11
3K
3K
CLK
D
CLK
D
SHARE ADJUST
ERROR AMPLIFIER
SHARE ADJUST
ERROR AMPLIFIER
Q
Q
+
-
+
-
RAMP
DISCHARGE
CLAMP
RAMP
DISCHARGE
CLAMP
ENABLE
ENABLE
IR3505 PHASE IC
IR3505 PHASE IC
PWM
COMPARATOR
-
PWM
COMPARATOR
-
VID6
VID6
+
+
VID6
VID6
VID6
VID6
-
+
-
+
+
-
+
-
BODY
BRAKING
COMPARATOR
BODY
BRAKING
COMPARATOR
PWM
LATCH
DOMINANT
PWM
LATCH
DOMINANT
S
RESET
R
S
RESET
R
VID6
VID6
VID6
VID6
+
+
+
+
CURRENT
SENSE
AMPLIFIER
CURRENT
SENSE
AMPLIFIER
+
-
+
-
CSIN-
CSIN-
VCC
VCCH
GATEH
SW
VCCL
GATEL
PGND
CSIN+
VCC
VCCH
GATEH
SW
VCCL
GATEL
PGND
CSIN+
CCS
CCS
RCS
RCS
CBST
CBST
IR3521
V3.03
COUT
VIN
VOSNS1+
VOUT1
GND
VOSNS1-