ADE7756AN Analog Devices Inc, ADE7756AN Datasheet - Page 8

• Manufacturer Part Number: ADE7756AN
• Description: IC ENERGY METERING 20-DIP
• Manufacturer: Analog Devices Inc

Specifications of ADE7756AN

• Rohs Status: RoHS non-compliant
• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 20-DIP (0.300", 7.62mm)
• Meter Type: Single Phase
• Lead Free Status / RoHS Status: Not Compliant

ADE7756
TERMINOLOGY
MEASUREMENT ERROR
The error associated with the energy measurement made by the
ADE7756 is defined by the following formula:
Percentage Error =
PHASE ERROR BETWEEN CHANNELS
The HPF (High-Pass Filter) in Channel 1 has a phase lead
response. To offset this phase response and equalize the phase
response between channels, a phase correction network is also
placed in Channel 1. The phase correction network ensures a
phase match between Channel 1 (current) and Channel 2 (volt-
age) to within ± 0.1° over a range of 45 Hz to 65 Hz and ± 0.2°
over a range 40 Hz to 1 kHz.
POWER SUPPLY REJECTION
This quantifies the ADE7756 measurement error as a percent-
age of reading when the power supplies are varied. For the ac
PSR measurement, a reading at nominal supplies (5 V) is taken.
A second reading is obtained with the same input signal levels
when an ac (175 mV rms/120 Hz) signal is introduced onto the
supplies. Any error introduced by this ac signal is expressed as a
percentage of reading—see Measurement Error definition above.
For the dc PSR measurement, a reading at nominal supplies
(5 V) is taken. A second reading is obtained with the same input
signal levels when the supplies are varied ± 5%. Any error intro-
duced is again expressed as a percentage of reading.
Pin No.
17
18
19
20



Energy
Registered
Mnemonic
CS
SCLK
DOUT
DIN
True Energy
by ADE
Description
Chip Select. Part of the 4-Wire SPI Serial Interface. This active low logic input allows the ADE7756
to share the serial bus with several other devices—see Serial Interface section.
Serial Clock Input for the Synchronous Serial Interface. All Serial data transfers are synchronized to
this clock. See Serial Interface section. The SCLK has a Schmitt-trigger input for use with a clock
source that has a slow edge transition time, e.g., opto-isolator outputs.
Data Output for the Serial Interface. Data is shifted out at this pin on the rising edge of SCLK. This
logic output is normally in a high impedance state unless it is driving data onto the serial data bus—
see Serial Interface section.
Data Input for the Serial Interface. Data is shifted in at this pin on the falling edge of SCLK—see
Serial Interface section.
7756
–
True Energy

 ×

100
%
ADC OFFSET ERROR
This refers to the dc offset associated with the analog inputs to
the ADCs. It means that with the analog inputs connected to
AGND the ADCs still see a dc analog input signal. The magni-
tude of the offset depends on the gain and input range selection
—see Typical Performance Characteristics. However, when HPF1
is switched on the offset is removed from Channel 1 (current)
and the power calculation is not affected by this offset. The
offsets may be removed by performing an offset calibration—see
Analog Inputs section.
GAIN ERROR
The gain error in the ADE7756 ADCs is defined as the differ-
ence between the measured ADC output code (minus the offset)
and the ideal output code—see Channel 1 ADC and Channel 2
ADC section. It is measured for each of the input ranges on
Channel 1 (1 V, 0.5 V and 0.25 V ). The difference is expressed
as a percentage of the ideal code.
GAIN ERROR MATCH
The Gain Error Match is defined as the gain error (minus the
offset) obtained when switching between a gain of 1 (for each of
the input ranges) and a gain of 2, 4, 8, or 16. It is expressed as a
percentage of the output ADC code obtained under a gain of 1.
This gives the gain error observed when the gain selection is
changed from 1 to 2, 4, 8, or 16.