DP8421ATVX-25 National Semiconductor, DP8421ATVX-25 Datasheet - Page 14

• Manufacturer Part Number: DP8421ATVX-25
• Description: IC CTRLR/DVR CMOS PROGRAM 68PLCC
• Manufacturer: National Semiconductor

Specifications of DP8421ATVX-25

• Controller Type: Dynamic RAM (DRAM)
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP8421ATVX-25

4 0 Port A Access Modes
4 2 ACCESS MODE 1
Mode 1 asynchronous access is selected by asserting the
input B1 during programming (B1
cesses to start immediately from the access request input
ADS To initiate a Mode 1 access CS is asserted followed
by ADS asserted If precharge time was met a refresh of
the DRAM or a Port B access was not in progress the RAS
(RASs) would be asserted from ADS being asserted If a
refresh or Port B access is in progress or precharge time is
required the controller will wait until these events have tak-
e
1) This mode allows ac-
(Continued)
FIGURE 8b Access Mode 1
14
en place and assert RAS (RASs) from the next rising edge
of clock
When ADS is asserted or sometime after AREQ must be
asserted At this time ADS can be negated and AREQ will
continue the access Also ADS can continue to be asserted
after AREQ has been asserted and negated however a
new access will not start until ADS is negated and asserted
again When address pipelining is not implemented ADS
and AREQ can be tied together
The access will end when AREQ is negated
TL F 8588– 62