CY14B101K-SP35XI Cypress Semiconductor Corp, CY14B101K-SP35XI Datasheet - Page 3

• Manufacturer Part Number: CY14B101K-SP35XI
• Description: IC NVSRAM 1MBIT 35NS 48SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of CY14B101K-SP35XI

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 1M (128K x 8)
• Speed: 35ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-SSOP
• Word Size: 8b
• Organization: 128Kx8
• Density: 1Mb
• Interface Type: Parallel
• Access Time (max): 35ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: SSOP
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: -40C to 85C
• Pin Count: 48
• Mounting: Surface Mount
• Supply Current: 60mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Configurations
Table 1. Pin Definitions
Document Number: 001-06401 Rev. *J
DQ0 – DQ7
Pin Name
A
V
V
0
V
RTCcap
RTCbat
HSB
V
V
WE
INT
NC
OE
CE
– A
X
X
CAP
CC
SS
1
2
16
Alt
W
G
E
Power Supply Capacitor Supplied Backup RTC Supply Voltage. (Left unconnected if V
Power Supply Battery Supplied Backup RTC Supply Voltage. (Left unconnected if V
Power Supply Power Supply Inputs to the Device.
Power Supply AutoStore™ Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM
Input Output Bidirectional Data I/O Lines. Used as input or output lines depending on operation
Input Output Hardware Store Busy. When LOW this output indicates a Hardware Store is in progress. When
No Connect
I/O Type
Ground
Output
Output
Input
Input
Input
Input
Input
V
RTCbat
V
DQ0
DQ2
DQ1
V
A
CAP
A
A
INT
NC
NC
NC
NC
A
A
A
A
A
A
A
A
SS
x
x
16
14
12
7
6
5
4
2
2
3
1
0
1
Address Inputs. Used to select one of the 131,072 bytes of the nvSRAM.
No Connects. This pin is not connected to the die
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the I/O pins
is written to the specific address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
Output Enable, Active LOW. The active low OE input enables the data output buffers during
READ cycles. Deasserting OE high causes the I/O pins to tri-state.
Crystal Connection Drives crystal on start up.
Crystal Connection for 32.768 kHz crystal.
Interrupt Output. Program to respond to the clock alarm, the watchdog timer, and the power
monitor. Programmable to either active HIGH (push or pull) or LOW (open drain).
Ground for the Device. Must be connected to ground of the system.
pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull up
resistor keeps this pin HIGH if not connected (connection optional).
to nonvolatile elements.
10
11
12
13
14
15
16
18
1
17
19
20
21
24
2
3
4
5
6
7
8
9
22
23
Figure 1. 48-Pin SSOP
48-SSOP
(Not To Scale)
Top View
Description
39
38
37
36
35
34
33
32
31
30
29
28
48
47
46
45
44
43
42
41
40
27
26
25
NC
DQ
DQ7
DQ3
V
A
HSB
A
A
A
NC
A
NC
NC
V
NC
V
OE
A
CE
DQ5
DQ4
WE
V
8
RTCcap
CC
15
13
9
11
SS
10
CC
6
RTCcap
RTCbat
CY14B101K
is used)
is used)
Page 3 of 29
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