MT47H16M16BG-3:B TR Micron Technology Inc, MT47H16M16BG-3:B TR Datasheet - Page 10

• Manufacturer Part Number: MT47H16M16BG-3:B TR
• Description: IC DDR2 SDRAM 256MBIT 3NS 84FBGA
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H16M16BG-3:B TR

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 3ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 84-FBGA
• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 450ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 215mA
• Pin Count: 84
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1046-2

Automotive Temperature
General Notes
PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
The automotive temperature (AT) option, if offered, has two simultaneous require-
ments: ambient temperature surrounding the device cannot be less than –40°C or
greater than +105°C, and the case temperature cannot be less than –40°C or greater
than +105°C. JEDEC specifications require the refresh rate to double when T
+85°C; this also requires use of the high-temperature self refresh option. Additionally,
ODT resistance and the input/output impedance must be derated when T
+85°C.
• The functionality and the timing specifications discussed in this data sheet are for the
• Throughout the data sheet, the various figures and text refer to DQs as “DQ.” The DQ
• Complete functionality is described throughout the document, and any page or dia-
• Any specific requirement takes precedence over a general statement.
DLL-enabled mode of operation.
term is to be interpreted as any and all DQ collectively, unless specifically stated oth-
erwise. Additionally, the x16 is divided into 2 bytes: the lower byte and the upper byte.
For the lower byte (DQ0–DQ7), DM refers to LDM and DQS refers to LDQS. For the
upper byte (DQ8–DQ15), DM refers to UDM and DQS refers to UDQS.
gram may have been simplified to convey a topic and may not be inclusive of all
requirements.
10
Micron Technology, Inc. reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR2 SDRAM
Functional Description
©2003 Micron Technology, Inc. All rights reserved.
C
is < 0°C or >
C
exceeds