5173N24-U THAT, 5173N24-U Datasheet - Page 8

• Manufacturer Part Number: 5173N24-U
• Description: Microphone Preamplifiers 36V, 100mA
• Manufacturer: THAT

Specifications of 5173N24-U

• Rohs: yes
• Common Mode Rejection Ratio (min): - 9 dB
• Input Offset Voltage: - 1.75 mV to + 1.75 mV
• Maximum Operating Temperature: + 85 C
• Package / Case: QFN-24
• Input Voltage Range (max): 3.6 V, 17 V
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V, 4.75 V to 17 V
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 2 uA, 7.6 mA
• Supply Voltage - Max: 3.6 V, 17 V
• Supply Voltage - Min: 3 V, 4.75 V
• Thd Plus Noise: 0.001 %
• Voltage Gain Db: 60 dB

Document 600166 Rev 01
SPI Control Interface
peripheral interface (SPI) port for digital control of
its internal parameters. The SPI port may be clocked
at speeds up to 10MHz, and thus a 16-bit data word
can be clocked into the chip in less than 2 us.
(CS), Data In (DIN), Data Out (DOUT), and Serial
Clock (SCLK). Figure 4 shows a single 5173 device
connected to the SPI port of a typical host microcon-
troller. A command sequence is initiated when CS
makes high to low transition. Data is clocked into
DIN on rising edges of SCLK, through an internal 16-
bit shift register which holds the 5173 configuration,
and then out the DOUT pin on falling edges of SCLK.
CS makes a low to high transition at the conclusion
of a command sequence. The DOUT pin is tristated
while CS is high so that multiple devices can be con-
nected to a single SPI MISO port on a host processor.
SCLK
CS
SCLK
DIN
DOUT
SDO
SDI
The 5173 provides a daisy chainable serial-
The SPI port consists of four signals: Chip Select
CS
Signal
Ignored
Tristate
0
0
1
16
17
18
19
Pin
0
0
2
Tel: [phone]; Fax: [phone]; Web: www.thatcorp.com
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
0
0
3
Input
Input
Input
Output/Tristate
Copyright © 2012, THAT Corporation; All rights reserved.
GAIN4
GAIN4
I/O
4
GAIN3
GAIN3
5
GAIN2
GAIN2
Figure 5. SPI Command Format
6
Device chip select input, active low. An SPI transfer begins with a high-to-low
CS transition and ends with a low-to-high CS transition. When CS is high,
SCLK transitions are ignored.
SPI serial clock input. An SPI master supplies this clock with frequencies up
to 10MHz. Data is clocked into the DIN pin on the rising edge of SCLK. Data
is clocked out of DOUT pin on the falling edge of SCLK.
SPI serial data input (Master-Out, Slave-In).
SPI serial data output (Master-In, Slave-Out). DOUT is tristated when CS is
high.
Table 3. SPI signals.
GAIN1
GAIN1
7
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GAIN0
GAIN0
8
0
0
9
*SPI terminology:
SPI Port
Microcontroller
0
0
10
Host
GPOMD
GPOMD
MOSI*
MISO*
Figure 4. Single 5173 connected to a
SCLK
GPIO
11
Function
GAINMD
GAINMD
Audio Preamplifier Digital Controller IC
12
host microcontroller.
GPO3
GPO3
13
GPO2
GPO2
14
GPO1
GPO1
15
DI
DOUT
SCLK
CS
GPO0
GPO0 Tristate
16
THAT5173