72V2113L7-5BC IDT, 72V2113L7-5BC Datasheet - Page 29

• Manufacturer Part Number: 72V2113L7-5BC
• Description: FIFO 256Kx18 /512Kx9 3.3V SUPERSYNC II FIFO
• Manufacturer: IDT

Specifications of 72V2113L7-5BC

• Data Bus Width: 18 bit
• Bus Direction: Unidirectional
• Memory Size: 4 Mbit
• Timing Type: Synchronous
• Organization: 256 K x 18
• Maximum Clock Frequency: 133.3 MHz
• Access Time: 7 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 8 V
• Maximum Operating Current: 35 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: BGA-100
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Part # Aliases: IDT72V2113L7-5BC

Q
NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. There must be at least two words written to and two words read from the FIFO before a Retransmit operation can be invoked.
6. RM is set HIGH during MRS.
IDT72V263/273/283/293/103/113 3.3V HIGH DENSITY SUPERSYNC II
8K x 18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9/18, 256K x 9/18, 512K x9
IDT72V2103/72V2113 3.3V HIGH DENSITY SUPERSYNC II
131,072 x 18/262,144 x 9, 262,144 x 18/524,288 x 9
WCLK
RCLK
0
WEN
REN
PAE
- Q
PAF
1
= first word written to the FIFO after Master Reset, W
HF
RT
EF
If x18 Input or x18 Output bus Width is selected, D = 131,072 for the IDT72V2103 and 262,144 for the IDT72V2113.
If both x9 Input and x9 Output bus Widths are selected, D = 262,144 for the IDT72V2103 and 524,288 for the IDT72V2113.
n
t
ENS
W
x
t
t
A
ENH
t
ENS
t
RTS
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
TM
ENH
REF
HF
t
SKEW2
1
NARROW BUS FIFO
W
x+1
TM
29
NARROW BUS FIFO
2
t
PAFS
1
t
REF
t
ENS
2
t
t
A
PAES
COMMERCIAL AND INDUSTRIAL
W
1
TEMPERATURE RANGES
(3)
JUNE 1, 2010
t
t
A
ENH
6119 drw14
W
2
(3)