AT34C02CY6-YH-T Atmel, AT34C02CY6-YH-T Datasheet - Page 8

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AT34C02CY6-YH-T

Manufacturer Part Number
AT34C02CY6-YH-T
Description
EEPROM 8 THIN MINI MAP 1.8V
Manufacturer
Atmel
Datasheet

Specifications of AT34C02CY6-YH-T

Product Category
EEPROM
Rohs
yes
Memory Size
2 Kbit
Organization
256 x 8
Data Retention
100 yr
Maximum Clock Frequency
0.4 MHz
Maximum Operating Current
3 mA
Operating Supply Voltage
1.8 V , 2.5 V , 3.3 V , 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
MLP
Access Time
900 ns
Interface Type
2-Wire
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
5000
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.7 V

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7.
8
The data word address lower four bits are internally incremented following the receipt of each data word. The higher data
word address bits are not incremented, retaining the memory page row location. When the word address, internally
generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than
sixteen data words are transmitted to the EEPROM, the data word address will “roll over” and previous data will be
overwritten. The address “roll over” during write is from the last byte of the current page to the first byte of the same
page.
The device will acknowledge a write command, but not write the data, if the software or hardware write protection has
been enabled. The write cycle time must be observed even when the write protection is enabled.
ACKNOWLEDGE POLLING: Once the internally-timed write cycle has started and the EEPROM inputs are disabled,
acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The
read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM
respond with a zero allowing the read or write sequence to continue.
Write protection
The software write protection, once enabled, write protects only the first-half of the array (00H - 7FH) while the hardware
write protection, via the WP pin, is used to protect the entire array.
PERMANENT SOFTWARE WRITE PROTECTION: The software write protection is enabled by sending a command,
similar to a normal write command, to the device which programs the permanent write protect register. This must be done
with the WP pin low. The write protect register is programmed by sending a write command with the device address of
0110 instead of 1010 with the address and data bit being don’t cares (see
write protection has been enabled, the device will no longer acknowledge the 0110 control byte. The software write
protection cannot be reversed even if the device is powered down. The write cycle time must be observed.
REVERSIBLE SOFTWARE WRITE PROTECTION: The reversible software write protection is enabled by sending a
command, similar to a normal write command, to the device which programs the reversible write protect register. This
must be done with the WP pin low. The write protect register is programmed by sending a write command 01100010
with pins A
protection can be reversed by sending a command 01100110 with pin A
and pin A
HARDWARE WRITE PROTECTION: The WP pin can be connected to V
V
software write protection register cannot be programmed when the WP pin is connected to V
to GND or left floating, the write protection mode is determined by the status of the software write protect register.
Figure 7-1.
SDA LINE
CC
Atmel AT34C02C
will write protect the entire array, regardless of whether or not the software write protection has been enabled. The
0
2
tied to VHV (see
and A
Setting permanent write protect register (PSWP)
S
T
A
R
T
0 1 1 0 A2 A1 A0 0
1
tied to ground or don't connect and pin A
CONTROL
BYTE
Figure
A
C
K
7-3).
ADDRESS
= Don't Care
WORD
A
C
K
DATA
0
connected to VHV (see
A
C
K
O
S
T
P
CC
2
, GND, or left floating. Connecting the WP pin to
tied to ground or no connect, pin A
Figure 7-1 on page
Figure
CC
7-2). The reversible write
. If the WP pin is connected
8). Once the software
5185E–SEEPR–3/11
1
tied to V
CC

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