AT34C02C-TP25-B ATMEL [ATMEL Corporation], AT34C02C-TP25-B Datasheet

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AT34C02C-TP25-B

Manufacturer Part Number
AT34C02C-TP25-B
Description
Two-wire Automotive Temperature Serial EEPROM with Permanent and Reversible Software Write Protect
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Description
The AT34C02C provides 2048 bits of serial electrically-erasable and programmable
read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of
the device incorporates a permanent and a reversible software write protection feature
while hardware write protection for the entire array is available via an external pin.
Once the permanent software write protection is enabled, by sending a special com-
mand to the device, it cannot be reversed. However, the reversible software write
protection is enabled and can be reversed by sending a special command. The hard-
ware write protection is controlled with the WP pin and can be used to protect the
entire array, whether or not the software write protection has been enabled. This
allows the user to protect none, first-half, or all of the array depending on the applica-
tion. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operations are essential. The AT34C02C is avail-
able in space saving 8-lead JEDEC SOIC and 8-lead TSSOP packages and is
accessed via a Two-wire serial interface. It is available in 2.5V (2.5V to 5.5V).
Table 1. Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Permanent and Reversible Software Write Protection for the First-half of the Array
Hardware Write Protection for the Entire Array
Standard-voltage Operation
Internally Organized 256 x 8
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400 kHz (2.5V and 5.5V) Compatibility
16-byte Page Write Modes
Partial Page Writes Are Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
8-lead JEDEC SOIC and 8-lead TSSOP Packages
– Software Procedure to Verify Write Protect Status
– 2.5 (V
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
CC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
= 2.5V to 5.5V)
GND
A0
A1
A2
GND
A0
A1
A2
8-lead TSSOP
8-lead SOIC
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
Two-wire
Automotive
Temperature
Serial EEPROM
with Permanent
and Reversible
Software Write
Protect
2K (256 x 8)
AT34C02C
Rev. 5242B–SEEPR–01/09

Related parts for AT34C02C-TP25-B

AT34C02C-TP25-B Summary of contents

Page 1

... The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT34C02C is avail- able in space saving 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a Two-wire serial interface ...

Page 2

... When the pins are hardwired, as many as eight 2K devices may be addressed on a single bus system. (Device addressing is discussed in detail under “Device Addressing,” page 9.) A device is selected when a corresponding hardware and software match is true. If these pins are left floating, the A2, A1, and A0 pins will be internally pulled down to GND. However, due to capaci- AT34C02C 2 *NOTICE: START ...

Page 3

... If the pin is left floating, the WP pin will be internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pins to a known state. When using a pull-up resistor, Atmel recommends using 10kΩ or less. Table 2. AT34C02C Write Protection Modes Permanent Write Protect WP Pin Status V ...

Page 4

... Page Mode Note: 1. This parameter is ensured by characterization only. Memory AT34C02C, 2K Serial EEPROM: The 2K is internally organized with 16 pages of 16 bytes each. Random word addressing requires a 8-bit data word address. Organization Device CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device ...

Page 5

... STANDBY MODE: The AT34C02C features a low-power standby mode which is enabled: (a) upon power-up or (b) after the receipt of the STOP bit and the completion of any internal operations. 2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any 2-wire part can be protocol reset by following these steps (a) Create a start bit condition, (b) Clock 9 cycles, (c) Create another start bit followed by a stop bit condition as shown below ...

Page 6

... Figure 4. Data Validity Figure 5. Start and Stop Condition Figure 6. Output Acknowledge Device The 2K EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (see Addressing AT34C02C 6 Figure 10 on page 11). 5242B–SEEPR–01/09 ...

Page 7

... The next 3 bits are the A2, A1 and A0 device address bits for the AT34C02C EEPROM. These 3 bits must compare to their corresponding hard-wired input pins. The eighth bit of the device address is the read/write operation select bit. A read operation is ini- tiated if this bit is high and a write operation is initiated if this bit is low ...

Page 8

... Figure 7. Setting Permanent Write Protect Register (PSWP) Figure 8. Setting Reversible Write Protect Register (RSWP) Figure 9. Clearing Reversible Write Protect Register (RSWP) AT34C02C 8 will write protect the entire array, regardless of whether or not CC S ...

Page 9

... STOP - Indicates permanent write protect register is programmed Program permanent write protect register ACK (irreversible) STOP - Indicates reversible write protect register is programmed Read out data don't care. Indicates RSWP register ACK is not programmed STOP - Indicates reversible write protect register is programmed AT34C02C ...

Page 10

... This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. AT34C02C 10 Not Programmed ...

Page 11

... Otherwise, it has been programmed and the device is write protected (reversible) at the first half of the array. Figure 10. Device Address 5242B–SEEPR–01/09 Figure 13 on page 12). Pin AT34C02C Figure 14 on page 12). Figure 15 on page 13). Preamble ...

Page 12

... Figure 11. Byte Write Figure 12. Page Write Figure 13. Current Address Read Figure 14. Random Read AT34C02C 12 5242B–SEEPR–01/09 ...

Page 13

... Figure 15. Sequential Read 5242B–SEEPR–01/09 AT34C02C 13 ...

Page 14

... AT34C02C Ordering Information Ordering Code (1) (NiPdAu Lead Finish) AT34C02CN-SP25-B (2) (NiPdAu Lead Finish) AT34C02CN-SP25-T (1) (NiPdAu Lead Finish) AT34C02C-TP25-B (2) (NiPdAu Lead Finish) AT34C02C-TP25-T Notes: 1. “-B” denotes bulk. 2. “-T” denotes tape and reel. SOIC = 4K per reel; TSSOP = 5K per reel. 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8A2 8-lead, 0.170" ...

Page 15

... E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5242B–SEEPR–01/ Top View TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT34C02C ∅ End View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 1.35 – ...

Page 16

... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT34C02C TITLE 8A2, 8-lead, 4 ...

Page 17

... Revision History Revision Date 5242B 1/2009 5242B–SEEPR–01/09 Comments Removed Preliminary status. AT34C02C 17 ...

Page 18

Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...

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