MAX1080BCUP+T Maxim Integrated, MAX1080BCUP+T Datasheet - Page 13

• Manufacturer Part Number: MAX1080BCUP+T
• Description: Analog to Digital Converters - ADC 5V 400ksps Low-Power 8Ch Serial 10-Bit
• Manufacturer: Maxim Integrated

Specifications of MAX1080BCUP+T

• Rohs: yes
• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 400 KSPs
• Resolution: 10 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 60 dB
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 559 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

8-Channel, Serial 10-Bit ADCs with Internal Reference
Figure 5. Quick-Look Circuit
To quickly evaluate the MAX1080/MAX1081s’ analog per-
formance, use the circuit of Figure 5. The devices require
a control byte to be written to DIN before each conver-
sion. Connecting DIN to V
$FF (HEX), which trigger single-ended unipolar conver-
sions on CH7 without powering down between conver-
sions. The SSTRB output pulses high for one clock
period before the MSB of the conversion result is shift-
ed out of DOUT. Varying the analog input to CH7 will
alter the sequence of bits from DOUT. A total of 16
clock cycles is required per conversion. All transitions
of the SSTRB and DOUT outputs typically occur 20ns
after the rising edge of SCLK.
Start a conversion by clocking a control byte into DIN.
With CS low, each rising edge on SCLK clocks a bit from
DIN into the MAX1080/MAX1081s’ internal shift register.
After CS falls, the first arriving logic “1” bit defines the
control byte’s MSB. Until this first “start” bit arrives, any
number of logic “0” bits can be clocked into DIN with no
effect. Table 3 shows the control-byte format.
The MAX1080/MAX1081 are compatible with SPI/
QSPI and MICROWIRE devices. For SPI, select the cor-
rect clock polarity and sampling edge in the SPI control
registers: set CPOL = 0 and CPHA = 0. MICROWIRE,
SPI, and QSPI all transmit a byte and receive a byte at
the same time. Using the Typical Operating Circuit, the
simplest software interface requires only three 8-bit
ANALOG
+2.500V
INPUT
0 TO
0.01µF
0.01µF
4.7µF
300ksps/400ksps, Single-Supply, Low-Power,
______________________________________________________________________________________
2.5V
CH7
REF
REFADJ
DD2
MAX1080
MAX1081
Starting a Conversion
feeds in control bytes of
SSTRB
DOUT
SHDN
SCLK
V
V
COM
GND
DD1
DD2
DIN
CS
Quick Look
0.1µF
V
DD2
V
DD2
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $3FF (HEX)
10µF
EXTERNAL CLOCK
transfers to perform a conversion (one 8-bit transfer to
configure the ADC, and two more 8-bit transfers to clock
out the conversion result). See Figure 17 for MAX1080/
MAX1081 QSPI connections.
Make sure the CPU’s serial interface runs in master
mode so the CPU generates the serial clock. Choose a
clock frequency from 500kHz to 6.4MHz (MAX1080) or
4.8MHz (MAX1081):
1) Set up the control byte and call it TB1. TB1 should
2) Use a general-purpose I/O line on the CPU to pull
3) Transmit TB1 and simultaneously receive a byte
4) Transmit a byte of all zeros ($00 hex) and simulta-
5) Transmit a byte of all zeros ($00 hex) and simulta-
6) Pull CS high.
+3V OR +5V
be of the format: 1XXXXXXX binary, where the Xs
denote the particular channel, selected conversion
mode, and power mode.
CS low.
and call it RB1. Ignore RB1.
neously receive byte RB2.
neously receive byte RB3.
CH1
OSCILLOSCOPE
CH2
Simple Software Interface
CH3
CH4
SCLK
SSTRB
DOUT*
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