MAX9322ECY-D Maxim Integrated, MAX9322ECY-D Datasheet - Page 7

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MAX9322ECY-D

Manufacturer Part Number
MAX9322ECY-D
Description
Communication ICs - Various LVECL/LVPECL 1
Manufacturer
Maxim Integrated
Type
Differential Divide-by-1/Divide-by-2 Clock Driverr
Datasheet

Specifications of MAX9322ECY-D

Supply Voltage - Max
+/- 3.8 V
Supply Voltage - Min
+/- 2.375 V
Supply Current
66 mA
Operating Supply Voltage
+/- 2.5 V, +/- 3.3 V
Supply Type
Analog
28, 29
TQFP
19
20
21
22
23
24
25
26
31
32
33
34
35
36
37
38
41
42
43
44
45
46
48
49
50
51
PIN
1, 17, 18, 34,
35, 38, 39,
51, 52, 68
_______________________________________________________________________________________
QFN
EP
25
26
27
28
29
30
31
32
41
42
43
44
45
46
47
48
55
56
57
58
59
60
62
63
64
65
Divide-by-1/Divide-by-2 Clock Driver
NAME
QD3
QD3
QD2
QD2
QD1
QD1
QD0
QD0
QC3
QC3
QC2
QC2
QC1
QC1
QC0
QC0
N.C.
QB2
QB2
QB1
QB1
QB0
QB0
QA1
QA1
QA0
QA0
V
EE
Inverting QD3 Output. Typically terminate with 50Ω resistor to V
Noninverting QD3 Output. Typically terminate with 50Ω resistor to V
Inverting QD2 Output. Typically terminate with 50Ω resistor to V
Noninverting QD2 Output. Typically terminate with 50Ω resistor to V
Inverting QD1 Output. Typically terminate with 50Ω resistor to V
Noninverting QD1 Output. Typically terminate with 50Ω resistor to V
Inverting QD0 Output. Typically terminate with 50Ω resistor to V
Noninverting QD0 Output. Typically terminate with 50Ω resistor to V
No Connection. Not internally connected.
Inverting QC3 Output. Typically terminate with 50Ω resistor to V
Noninverting QC3 Output. Typically terminate with 50Ω resistor to V
Inverting QC2 Output. Typically terminate with 50Ω resistor to V
Noninverting QC2 Output. Typically terminate with 50Ω resistor to V
Inverting QC1 Output. Typically terminate with 50Ω resistor to V
Noninverting QC1 Output. Typically terminate with 50Ω resistor to V
Inverting QC0 Output. Typically terminate with 50Ω resistor to V
Noninverting QC0 Output. Typically terminate with 50Ω resistor to V
Inverting QB2 Output. Typically terminate with 50Ω resistor to V
Noninverting QB2 Output. Typically terminate with 50Ω resistor to V
Inverting QB1 Output. Typically terminate with 50Ω resistor to V
Noninverting QB1 Output. Typically terminate with 50Ω resistor to V
Inverting QB0 Output. Typically terminate with 50Ω resistor to V C
Noninverting QB0 Output. Typically terminate with 50Ω resistor to V
Inverting QA1 Output. Typically terminate with 50Ω resistor to V
Noninverting QA1 Output. Typically terminate with 50Ω resistor to V
Inverting QA0 Output. Typically terminate with 50Ω resistor to V
Noninverting QA0 Output. Typically terminate with 50Ω resistor to V
The exposed pad of the QFN package is internally connected to V
Application Note HFAN-08.1.
LVECL/LVPECL 1:15 Differential
Pin Description (continued)
FUNCTION
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
C
EE
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
. Refer to
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
7

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