EM2420 ETC [List of Unclassifed Manufacturers], EM2420 Datasheet - Page 31

• Manufacturer Part Number: EM2420
• Description: 2.4 GHz IEEE 802.15.4 / ZigBee RF Transceiver
• Manufacturer: ETC [List of Unclassifed Manufacturers]

Figure 11. Microcontroller interface example
Receive mode
In receive mode, the SFD pin goes high
after the start of frame delimiter (SFD)
field has been completely received. If
address recognition is disabled or is
successful, the SFD pin goes low again
only after the last byte of the MPDU has
been received. If the received frame fails
address recognition, the SFD pin goes low
immediately. This is illustrated in Figure
12.
The FIFO pin is high when there are one
or more data bytes in the RXFIFO. The
first byte to be stored in the RXFIFO is the
length field of the received frame, i.e. the
FIFO pin is set high when the length field
is written to the RXFIFO. The FIFO pin
then remains high until the RXFIFO is
empty.
If
completely or partially inside the RXFIFO,
the FIFO pin will remain high until the
RXFIFO is empty.
When address recognition is enabled,
data should not be read out of the RXFIFO
before the address is completely received,
since the frame may be automatically
flushed if it fails address recognition. This
may be handled by using the FIFOP pin
RXFIFO overflow
The RXFIFO can only contain a maximum
of 128 bytes at a given time. This may be
divided between multiple frames, as long
Ember Part Number: 120-0049-000C
a
previously
received
EM2420
frame
FIFOP
FIFO
SCLK
CCA
SFD
CSn
SO
SI
EM2420 Datasheet
is
as the total number of bytes is 128 or less.
If an overflow occurs in the RXFIFO, this
is signaled to the microcontroller by setting
the FIFO pin low while the FIFOP pin is
high. Data already in the RXFIFO will not
be affected by the overflow, i.e. frames
already received may be read out.
A SFLUSHRX command strobe is required
after a RXFIFO overflow to enable
reception of new data. Note that at least
one byte should be read from the RXFIFO
prior to issuing the SFLUSHRX command
strobe. Otherwise the FIFO will be flushed,
but the FIFOP pin will not go low before a
byte is read.
For security enabled frames, the MAC
layer must read the source address of the
received frame before it can decide which
key to use to decrypt or authenticate. This
data must therefore not be overwritten
even if it has been read out of the RXFIFO
by
SECCTRL0.RXFIFO_PROTECTION control
bit is set, the EM2420 also protects the
frame header of security enabled frames
until decryption has been performed. If no
MAC
implemented outside the EM2420, this bit
may be cleared to achieve optimal use of
the RXFIFO.
GIO0
Interrupt
GIO1
Timer Capture
MOSI
MISO
SCLK
GIO2
the
security
µC
microcontroller.
is
used
EM2420
or
Page 31 of 89
if
If
it
the
is