HYS64T32000HM-37-A Infineon, HYS64T32000HM-37-A Datasheet - Page 20

• Manufacturer Part Number: HYS64T32000HM-37-A
• Description: Double-Data-Rate-Two SDRAM Micro-DIMM
• Manufacturer: Infineon

Preliminary
4.1
For testing the
Table 14
Parameter
CAS Latency
Clock Cycle Time
Active to Read or Write delay
Active to Active / Auto-Refresh command
period
Active bank A to Active bank B command
delay
Active to Precharge Command
Precharge Command Period
Auto-Refresh to Active / Auto-Refresh
command period
Average periodic Refresh interval
4.2
The ODT function adds additional current consumption
to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A[6,2] in the EMRS(1) a
“weak” or “strong” termination can be selected. The
Table 15
Parameter
Note: For power consumption calculations the ODT duty cycle has to be taken into account
Data Sheet
Enabled ODT current per DQ
ODT is HIGH; Data Bus inputs are FLOATING
Active ODT current per DQ
ODT is HIGH; worst case of Data Bus inputs
are STABLE or SWITCHING.
I
IDD Measurement Test Condition
ODT (On Die Termination) Current
ODT current per terminated pin
DD
I
DD
Test Conditions
parameters, the timing parameters as in
Symbol
CL
t
t
t
t
t
t
t
t
CKmin
RCDmin
RCmin
RRDmin
RASmin
RPmin
RFCmin
REFI
Symbol min.
I
I
min
ODTO
ODTT
20
Double-Data-Rate-Two SDRAM Micro-DIMM
current consumption for any terminated input pin,
depends on the input pin is in tri-state or driving “0” or
“1”, as long a ODT is enabled during a given period of
time.
5
2.5
10
5
Table 14
HYS64T[3200/6402]0[H/K/L]M–[3.7/5]–A
-3.7
PC2-4200-4-4-4 PC2-3200-3-3-3
4
3.75
15
60
10
45
15
105
7.8
typ.
6
3
12
6
are used.
I
max. Unit
7.5
3.75
15
7.5
DD
Specifications and Conditions
-5
3
5
15
60
10
45
15
105
7.8
mA/DQ A6 = 0, A2 = 1
mA/DQ A6 = 1, A2 = 0
mA/DQ A6 = 0, A2 = 1
mA/DQ A6 = 1, A2 = 0
03242004-2CBE-IJ2X
EMRS(1) State
Rev. 0.6, 2004-06
Unit
t
ns
ns
ns
ns
ns
ns
ns
CK
s