HYS64T32000HM-37-A Infineon, HYS64T32000HM-37-A Datasheet
HYS64T32000HM-37-A
Related parts for HYS64T32000HM-37-A
HYS64T32000HM-37-A Summary of contents
Page 1
HYS64T32000[H/K/L]M–[3.7/5]–A HYS64T64020[H/K/L]M–[3.7/5]–A Double-Data-Rate-Two SDRAM Micro-DIMM DDR2 MDIMM Rev. 0. ...
Page 2
... Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life ...
Page 3
HYS64T32000[H/K/L]M–[3.7/5]–A HYS64T64020[H/K/L]M–[3.7/5]–A Double-Data-Rate-Two SDRAM Micro-DIMM DDR2 MDIMM Rev. 0. ...
Page 4
... Added production variants with “H” instead of “L” in product type We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: techdoc.mp@infineon.com 2004-06 2004-04 mp_a4_v2.3_2004-01-14.fm Template: ...
Page 5
Preliminary Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 6
... RAS-CAS-Delay min. Row Precharge Time min. Row Active Time min. Row Cycle Time 1.2 Description The INFINEON HYS64T[3200/6402]0[H/K/L]M– [3.7/5]–A module family are low profile Unbuffered Micro-DIMM modules “MDIMMs” with 30,0 mm height based on DDR2 technology. DIMMs are available as 32M 64 and 64M ...
Page 7
... PC2-3200M-333-11-B0 one rank 256 MByte DIMM HYS64T64020HM-3.7-A 512MB 2Rx16 PC2-4200M-444-11-A0 two ranks 512 MByte DIMM 512 Mbit ( 16) HYS64T64020LM-3.7-A 512MB 2Rx16 PC2-4200M-444-11-A0 two ranks 512 MByte DIMM HYS64T32000HM-3.7-A 256MB 1Rx16 PC2-4200M-444-11-B0 one rank 256 MByte DIMM HYS64T32000LM-3.7-A 256MB 1Rx16 PC2-4200M-444-11-B0 one rank 256 MByte DIMM HYS64T64020HM-5-A ...
Page 8
... Clock Signals 1:0 Complement Clock Signals 1:0 Clock Enables Note: 2-rank module Note: 1-rank module Chip Select Rank 0 Chip Select Rank 1 Note: 2-rank module Note: 1-rank module Row Address Strobe Column Address Strobe Write Enable Bank Address 1:0 Address Inputs 9:0 Address Input 10/Autoprecharge Address Input 11 Address Input 12 Rev ...
Page 9
Preliminary Table 5 Pin Configuration of MDIMM Pin# Data Signals 109 110 114 115 117 118 125 126 128 129 133 134 136 137 ...
Page 10
Preliminary Table 5 Pin Configuration of MDIMM Pin# 180 182 183 188 189 191 192 200 201 95 96 101 102 203 204 208 209 112 120 131 36 177 79 90 ...
Page 11
... Power Supply DD V PWR – EEPROM Power Supply DDSPD V GND – Ground Plane SS ODT0 On-Die Termination Control 1:0 Note: 2-rank module ODT1 NC Note: 1-rank module NC NC – Not connected Note: Pins not connected on Infineon 11 Overview DQS signals MDIMMs Rev. 0.6, 2004-06 03242004-2CBE-IJ2X ...
Page 12
Preliminary Table 6 Abbreviations for Pin Type Abbreviation Description I Standard input-only pin. Digital levels. O Output. Digital levels. I/O I bidirectional input/output signal. AI Input. Analog levels. PWR Power GND Ground NC Not Connected Table 7 Abbreviations ...
Page 13
Preliminary V - Pin 001 REF DQ0 - Pin 003 V - Pin 005 SS DQS0 - Pin 007 DQ2 - Pin 009 V - Pin 011 SS DQ9 - Pin 013 NC - Pin 015 V - Pin 017 ...
Page 14
... DQS signals are complements, and timing is relative to the crosspoint of respective DQS and DQS. If the module operated in single ended strobe mode, all DQS signals must be tied on the system board to and DDR2 SDRAM mode registers programmed appropriately. ...
Page 15
Preliminary 2 Block Diagrams BA0 - BA1: SDRAMs BA0 - BA1 A0 - An: SDRAMs RAS RAS: SDRAMs CAS CAS: SDRAMs WE: SDRAMs D0 ...
Page 16
Preliminary BA0 - BA1 BA0 - BA1: SDRAMs An: SDRAMs RAS RAS: SDRAMs CAS CAS: SDRAMs WE: SDRAMs ...
Page 17
Preliminary 3 Electrical Characteristics 3.1 Operating Conditions Table 9 Absolute Maximum Ratings Parameter V Voltage on any pins relative Voltage on relative Voltage on V relative to V DDQ SS Storage Humidity (without ...
Page 18
Preliminary 4 Specifications and Conditions Table 12 Measurement Conditions DD Parameter Operating Current 0 t One bank Active - Precharge; CK valid commands. Address and control inputs are SWITCHING, Databus inputs are SWITCHING Operating Current 1 One ...
Page 19
... All Bank Interleave Read Current All banks are being interleaved at minimum and address bus inputs are STABLE during DESELECTS 1 1.8 V DDQ DD 2) For details and notes see the relevant INFINEON component data sheet I Table 13 Specification DD Product Type Organization 256 MB 1 Rank 64 Symbol Max ...
Page 20
Preliminary 4.1 Test Conditions For testing the parameters, the timing parameters Table 14 IDD Measurement Test Condition Parameter CAS Latency Clock Cycle Time Active to Read or Write delay Active to Active / Auto-Refresh ...
Page 21
Preliminary 5 Electrical Characteristics & AC Timings Table 16 AC Timing - Absolute Specifications 5/ 3.7 Parameter DQ output access time from CK/CK CAS A to CAS B Command Period CK, CK high-level width Clock cycle time CKE minimum high ...
Page 22
... Exit precharge power-down to any valid command (other than NOP or Deselect) Exit Self-Refresh to non-read command Exit Self-Refresh to read command 1) For details and notes see the relevant INFINEON component datasheet & °C 85 °C 4) CASE ° ...
Page 23
Preliminary Table 17 ODT AC Electrical Characteristics and Operating Conditions (all speed bins) Symbol Parameter / Condition t ODT turn-on delay AOND t ODT turn-on AON t ODT turn-on (Power-Down AONPD Modes) t ODT turn-off delay AOFD t ODT turn-off ...
Page 24
Preliminary 6 SPD Codes Table 18 SPD Codes for PC2-4200M and PC2-3200M Product Type Organization Label Code Jedec SPD Revision Byte# Description 0 Programmed SPD Bytes PROM 1 Total number of Bytes PROM 2 ...
Page 25
... SDRAM @ CL -1 [ns] AC max (Byte 18) [ns] CK max t 26 SDRAM @ CL -2 [ns] AC max 27 t [ns] RPmin t 28 [ns] RRDmin t 29 [ns] RCDmin t 30 [ns] RASmin 31 Module Density per Rank [ns [ns [ns [ns [ns [ns] WTR 38 t [ns] ...
Page 26
... JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( JEDEC ID Code of Infineon ( Module Manufacturer Location xx 73 Product Type, Char 1 74 Product Type, Char 2 ...
Page 27
... Test Program Revision Code 93 Module Manufacturing Date Year 94 Module Manufacturing Date Week 95 Module Serial Number (1) 96 Module Serial Number (2) 97 Module Serial Number (3) 98 Module Serial Number ( Not used 127 128- BLANK 255 Data Sheet HYS64T[3200/6402]0[H/K/L]M–[3.7/5]–A Double-Data-Rate-Two SDRAM Micro-DIMM ...
Page 28
Preliminary 7 Package Outlines A Detail of contacts Burnished, no burr allowed Figure 4 PCB Raw Card A Component Placement L-DIM-214-1 Data Sheet HYS64T[3200/6402]0[H/K/L]M–[3.7/5]–A Double-Data-Rate-Two SDRAM Micro-DIMM 54 ±0.15 0.62 ±0.03 (44.72) 43.38 ±0.02 D 106 x 0.4 = 42.4 ...
Page 29
Preliminary D A Detail of contacts 0.4 Burnished, no burr allowed Figure 5 PCB Raw Card B Component Placement L-DIM-214-2 Data Sheet HYS64T[3200/6402]0[H/K/L]M–[3.7/5]–A Double-Data-Rate-Two SDRAM Micro-DIMM 54 ±0.15 0.62 ±0.03 (44.72) 43.38 ±0.02 0.1 106 x 0.4 = 42.4 B ...
Page 30
... Product Type Nomenclature (DDR2 DRAMs and DIMMs) Infineon’s nomenclature uses simple coding combined with some propriatory coding. for module and component product type number as well as the field number. The detailed field description together with possible values and coding explanation is listed for modules in ...
Page 31
... Published by Infineon Technologies AG ...