HYS6472V4200GU Siemens, HYS6472V4200GU Datasheet - Page 8

• Manufacturer Part Number: HYS6472V4200GU
• Description: 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
• Manufacturer: Siemens

Parameter
Clock and Clock Enable
Clock Cycle Time
System Frequency
Clock Access Time
Clock High Pulse Width
Clock Low Pulse Width
Input Setup time
Input Hold Time
CKE Setup Time
CKE Setup Time
Transition time (rise and fall)
Common Parameters
RAS to CAS delay
Precharge Time
Active Command Period
Cycle Time
Bank to Bank Delay Time
CAS to CAS delay time (same
bank)
AC Characteristics 3)4)
T
Semiconductor Group
(Power down mode)
(Self Refresh Exit)
A
= 0 to 70 C;
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
V
SS
= 0 V;
V
CC
= 3.3 V
Symbol
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CK
AC
CH
CL
CS
CH
CKSP
CKSR
T
RCD
RP
RAS
RC
RRD
CCD
0.3 V,
min. max. min. max. min. max.
PC100-222
2.5
10
10
20
20
50
70
16
–
–
–
–
3
3
2
1
8
1
1
t
T
8
-8
= 1 ns
100k
100
100
–
–
6
6
–
–
–
–
–
–
–
–
–
–
–
–
Limit Values
PC100-323
2.5
10
12
10
20
30
60
80
20
–
–
–
–
3
3
2
1
1
1
-8B
HYS64(72)V4200/8220GU
100k
100
83
–
–
6
7
–
–
–
–
–
–
–
–
–
–
–
–
3.5
3.5
10
15
30
30
70
80
20
–
–
–
–
3
1
3
8
1
1
SDRAM-Modules
PC66
-10
100k ns
100
66
–
–
8
9
–
–
–
–
–
–
–
–
–
–
–
–
Unit
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLK
Note
4,5)
6)
6)
7)
7)
8)
9)