HYS6472V4200GU Siemens, HYS6472V4200GU Datasheet - Page 12

• Manufacturer Part Number: HYS6472V4200GU
• Description: 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
• Manufacturer: Siemens

Semiconductor Group
Byte#
62-61 Superset information (may be
128+ Unused storage locations
125
126
127
64-
28
29
30
31
32
33
34
35
62
63
Minimum Row Active to Row
Active delay tRRD
Minimum RAS to CAS delay
tRCD
Minimum RAS pulse width tRAS
Module Bank Density (per bank)
SDRAM input setup time
SDRAM input hold time
SDRAM data input setup time
SDRAM data input hold time
used in future)
SPD Revision
Checksum for bytes 0 - 62
Manufacturers information (optio-
nal)
(FFh if not used)
Max. Frequency Specification
100 Mhz support details
Description
Revision 1.2
SPD Entry
32 MByte
100 MHz
16 ns
45 ns
Value
20 ns
2 ns
1 ns
2 ns
1 ns
12
4Mx64
2D
D7
XX
AF
FF
08
20
10
20
10
FF
10
14
12
64
-8
4Mx64
-8B
AD
2D
XX
FF
FF
14
14
08
20
10
20
10
12
15
64
HYS64(72)V4200/8220GU
4Mx72
XX
2D
FF
E9
AF
FF
10
14
08
20
10
20
10
12
64
-8
Hex
SDRAM-Modules
8Mx64
2D
D8
XX
FF
FF
08
20
10
20
10
FF
10
14
12
64
-8
8Mx64
-8B
2D
XX
FD
FF
FF
14
14
08
20
10
20
10
12
16
64
8Mx72
EA
XX
2D
FF
FF
FF
10
14
08
20
10
20
10
12
64
-8