AM79C32A Advanced Micro Devices, AM79C32A Datasheet - Page 33

• Manufacturer Part Number: AM79C32A
• Description: Digital Subscriber Controller (DSC) Circuit
• Manufacturer: Advanced Micro Devices

MAP Mode Register 1 — (MMR1) — Read/Write
Address = Indirect 69H
Note:
*To remove the sidetone path completely, it is necessary to enable the STG function by setting MMR1 bit 6 to 1, and program the
STGR coefficient to 9008 (hex).34
MAP Mode Register 2 — (MMR2) — Read/Write
Address = Indirect 6AH
Note:
For most applications, MMR2 bits 5 and 6 should always be written to logical 0. This enables the 50–60 Hz rejection filter and the
internal offset cancellation circuits to operate normally. They can both be disabled when system or test conditions require the
transmission of DC or low frequency signals.
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Logical 1
A-Law
GX coefficient loaded from register
GR coefficient loaded from register
GER coefficient loaded from register
X coefficient loaded from register
R coefficient loaded from register
Sidetone gain coefficient loaded from register
Digital loopback #1 at MAP enabled
Logical 1
AINB selected
LS1/LS2 selected
DTMF enabled
Tone generator enabled
Tone ringer enabled
High pass filter disabled
ADC auto-zero function disabled
Reserved, must be Logical 0
Table 33. Map Mode Register 1
Table 34. Map Mode Register 2
Am79C30A/32A Data Sheet
Logical 0 (Default Value)
GX bypassed; gain = 0 dB
GR bypassed; gain = 0 dB
GER bypassed; gain = 0 dB
X bypassed; response = flat
R bypassed; response = flat
STG gain = –18 dB*
Logical 0 (Default Mode)
AINA selected
EAR1/EAR2 selected
DTMF disabled
Tone generator disabled
Tone ringer disabled
High pass filter enabled
Reserved, must be Logical 0
Digital loopback #1 at MAP disabled
ADC auto-zero function enabled
-Law
33