AM186ES Advanced Micro Devices, AM186ES Datasheet - Page 68

• Manufacturer Part Number: AM186ES
• Description: microcontrollers provide a low-cost/ high-performance solution for embedded system designers who wish to use the x86 architecture.
• Manufacturer: Advanced Micro Devices

Alphabetical Key to Switching Parameter Symbols
Notes:
The following parameters are not defined or used at this time: 41, 56, 60, 73, 74, and 76.
68
Parameter
Symbol
t
t
t
t
t
t
t
t
t
t
ARYCHL
CH1CH2
t
t
t
t
ARYLCL
t
t
t
t
t
CL2CL1
ARYCH
t
t
t
t
CHCSV
CHCSX
CHCTV
t
t
CHRFD
t
t
t
t
t
t
t
t
t
CLARX
t
t
t
t
CLCLX
CLCSL
CLCSV
CLDOX
t
t
CICOA
CICOB
t
CHCK
CHCV
CHDX
AVCH
AVWL
CHAV
CHCL
CHCZ
CHLH
CHSV
CKHL
CKLH
CLCH
CLCK
AVBL
AVRL
AZRL
CHLL
CLAV
CLAX
CLAZ
CLCL
CLDV
AVLL
CKIN
No.
49
51
52
87
14
12
66
65
24
45
68
38
44
67
18
22
64
63
11
79
69
70
39
36
40
46
50
15
43
37
42
80
81
16
30
8
9
3
5
6
7
Description
ARDY Resolution Transition Setup Time
ARDY Inactive Holding Time
ARDY Setup Time
A Address Valid to WHB, WLB Low
AD Address Valid to Clock High
AD Address Valid to ALE Low
A Address Valid to RD Low
A Address Valid to WR Low
AD Address Float to RD Active
CLKOUTA Rise Time
CLKOUTA High to A Address Valid
X1 High Time
CLKOUTA High Time
CLKOUTA High to LCS/UCS Valid
MCS/PCS Inactive Delay
Control Active Delay 2
Command Lines Valid Delay (after Float)
Command Lines Float Delay
Status Hold Time
ALE Active Delay
ALE Inactive Delay
CLKOUTA High to RFSH Valid
Status Active Delay
X1 to CLKOUTA Skew
X1 to CLKOUTB Skew
X1 Fall Time
X1 Period
X1 Rise Time
CLKOUTA Fall Time
ARDY Active Hold Time
AD Address Valid Delay
Address Hold
AD Address Float Delay
CLKOUTA Low Time
X1 Low Time
CLKOUTA Period
LCS Inactive Delay
LCS Active Delay
MCS/PCS Active Delay
Data Hold Time
Data Valid Delay
Am186
TM
ER and Am188
TM
ER Microcontrollers Data Sheet
Parameter
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WHDEX
t
t
t
COAOB
CVDEX
CXCSX
t
t
t
t
CLHAV
t
t
t
CLSRY
CLTMV
CVCTV
CVCTX
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SRYCL
WLWH
INVCH
RESIN
WHDX
WHLH
CLRH
INVCL
LOCK
RFCY
RHDX
RHLH
RLRH
SHDX
CLDX
CLEV
CLRF
CLRL
CLSH
DVCL
DVSH
DXDL
HVCL
LCRF
RHAV
CLSL
LHAV
LHLL
LLAX
LRLL
SLDV
No.
71
62
82
27
25
72
48
55
83
20
31
21
17
75
19
58
53
54
86
23
10
13
61
84
57
85
29
59
28
26
77
78
47
35
34
33
32
2
4
1
Description
Data in Hold
CLKOUTA Low to SDEN Valid
HLDA Valid Delay
CLKOUTA High to RFSH Invalid
RD Inactive Delay
RD Active Delay
Status Inactive Delay
CLKOUTA Low to SCLK Low
SRDY Transition Hold Time
Timer Output Delay
CLKOUTA to CLKOUTB Skew
Control Active Delay 1
Control Inactive Delay
DEN Inactive Delay
MCS/PCS Hold from Command Inactive
Data in Setup
Data Valid to SCLK High
DEN Inactive to DT/R Low
HOLD Setup
Peripheral Setup Time
DRQ Setup Time
LCS Inactive to RFSH Active Delay
ALE High to Address Valid
ALE Width
AD Address Hold from ALE Inactive
Maximum PLL Lock Time
LCS Precharge Pulse Width
RES Setup Time
RFSH Cycle Time
RD Inactive to AD Address Active
RD High to Data Hold on AD Bus
RD Inactive to ALE High
RD Pulse Width
SCLK High to SPI Data Hold
SCLK Low to SPI Data Valid
SRDY Transition Setup Time
WR Inactive to DEN Inactive
Data Hold after WR
WR Inactive to ALE High
WR Pulse Width